参数资料
型号: T436432B-7S
厂商: TM Technology, Inc.
英文描述: 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM
中文描述: 200万× 32内存为512k × 32 x 4Banks同步DRAM
文件页数: 14/72页
文件大小: 731K
代理商: T436432B-7S
TE
CH
tm
T436432B
TM Technology Inc. reserves the right
P. 14
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
These two bits are used to enter the test mode and must be programmed to "00" in normal operation.
Test Mode field (A8~A7)
A8
0
0
1
A7
0
1
X
Test Mode
normal mode
Vendor Use Only
Vendor Use Only
This bit is used to select the burst write length.
Write Burst Length (A9)
A9
0
1
Write Burst Length
Burst
Single Bit
9
No-Operation command
(RAS# = "H", CAS# = "H", WE# = "H")
This prevents unwanted commands from being registered during idle or wait states.
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS# is Low).
10
Burst Stop command
(RAS# = "H", CAS# = "H", WE# = "L")
The Burst Stop command is used to terminate either fixed-length or full-page bursts. This command is
only effective in a read/write burst without the auto precharge function. The terminated read burst ends after a
delay equal to the CAS# latency (refer to the following figure). The termination of a write burst is shown in the
following figure.
CLK
COMMAND
T0
T 1
T2
T3
T4
T5
T6
T7
T8
READ A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
Burst Stop
CAS# latency=2
tCK2, DQ's
CAS# latency=3
tCK3, DQ's
DOUT A0
DOUT A1
DOUT A2
DOUT A3
DOUT A0
DOUT A1
DOUT A2
DOUT A3
The burst ends after a delay equal to the CAS# latency.
Termination of a Burst Read Operation (Burst Length
4, CAS# Latency = 2, 3)
CLK
COMMAND
T0
T 1
T2
T3
T4
T5
T6
T7
T8
NOP
WRITE A
NOP
NOP
NOP
NOP
NOP
NOP
Burst Stop
CAS# latency= 2, 3
DQ's
DIN A0
DIN A1
DIN A2
don't care
Input data for the Write is masked.
Termination of a Burst Write Operation (Burst Length = X, CAS# Latency = 1, 2, 3)
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