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参数资料
| 型号： | TAPC640 |
| 厂商： | Lineage Power |
| 英文描述： | High-Speed Switching ATM Port Controller (APC)(高速开关ATM端口控制器) |
| 中文描述： | 高速开关ATM端口控制器（APC）（高速开关自动柜员机端口控制器） |
| 文件页数： | 6/8页 |
| 文件大小： | 165K |
| 代理商： | TAPC640 |
TAPC640
High-Speed Switching ATM Port Controller (APC)
Product Brief
August 2000
6
Lucent Technologies Inc.
Description
(continued)
Egress Queue Scheduler (eQSC)
The eQSC implements a sophisticated per virtual con-
nection queue architecture and hierarchical scheduling
algorithm for egress.
The eQSC performs the virtual connection enqueue,
dequeue, and subport spatial and logical multicast
operations, which are supported by the HLX, VCT, and
BRI blocks.
It provides novel scheduling algorithms to service up to
64K VC queues, five traffic classes (CBR, rt-VBR, nrt-
VBR, ABR, and UBR), and 32 subports using a four-
level hierarchy.
Subports 0 to 15 are designated as type 1 and have
dedicated three-level hierarchical schedulers similar to
iQSC. The first (VC) level of the hierarchy contains per-
VC schedulers for each of the five traffic classes. Each
VC scheduler can support all 64K VC queues as
needed. The second (class) level of the hierarchy con-
tains two class schedulers: one to provide guaranteed
bandwidth and one to distribute excess bandwidth to
each work-conserving VC scheduler. The third (port
merge) level of the hierarchy merges the CBR VC
scheduler and the two class schedulers together.
The type 1 CBR scheduler uses a non-work-conserv-
ing asynchronously shaped virtual clock (AShVC) algo-
rithm to shape CBR virtual connections to any one of
up to 32 user-programmable rates.
The type 1 rt-VBR scheduler uses a work-conserving
starting potential fair queuing (SPFQ) algorithm to
schedule virtual connections using any one of up to 16
user-programmable rates/weights.
The type 1 nrt-VBR, ABR, and UBR schedulers each
use a work-conserving variable length frame based
weighted round-robin (WRR) algorithm to schedule vir-
tual connections using one of up to 256K different
weights.
The guaranteed traffic class scheduler (GTS) uses the
ShVC algorithm to provide guaranteed bandwidth to
each of four classes (the rt-VBR, nrt-VBR, ABR, and
UBR VC schedulers). A user-programmable rate is pro-
vided for each class.
The excess bandwidth class scheduler (EBS) uses a
work-conserving self-clocked fair queuing (SCFQ)
algorithm to fairly allocate excess bandwidth to each of
four classes (the rt-VBR, nrt-VBR, ABR, and UBR VC
schedulers). A user-programmable weight is provided
for each class.
The port merge scheduler merges the CBR VC sched-
uler and the GTS class scheduler together with strict
priority over the EBS class scheduler. CBR and GTS
service is arbitrated at this level using timestamps.
Subports 16 to 31 are designated as type 2 and have
dedicated two-level hierarchical schedulers. The first
(VC) level of the hierarchy contains per-VC schedulers
for each of the five traffic classes. Each VC scheduler
can support all 64K VC queues as needed. The sec-
ond (class) level of the hierarchy merges the VC sched-
ulers together.
The type 2 CBR, rt-VBR, nrt-VBR, ABR, and UBR
schedulers each use a work-conserving variable length
frame based weighted round-robin (WRR) algorithm to
schedule virtual connections using one of up to 256K
different weights.
The type 2 class schedulers can be configured (for all
16 subports as a group) to use either an AShVC algo-
rithm to shape each of the VC schedulers or a SCFQ
algorithm to fairly allocate bandwidth to each of the
classes. A user-programmable rate or weight is pro-
vided for each class. When the type 2 schedulers are
configured for AShVC, they each provide five shaped
pipes of virtual connections.
The top level (subport scheduler) of the hierarchy uses
a non-work-conserving shaped virtual clock (ShVC)
algorithm to shape each of the subport schedulers to
its user-programmable rate. Two additional configura-
tion options are provided to allow excess bandwidth to
be granted to subport 31 (the microprocessor capture
port) and a user-identified SAR port for work-conserv-
ing operation on those ports.
Following the subport scheduler is a virtual MPHY
mapping function. The default configuration provides a
one-to-one mapping between subport scheduler and
MPHY address. This function can be configured by the
user to map multiple subport schedulers to the same
UTOPIA port. This allows multiple virtual MPHYs to be
created within one physical MPHY device.
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相关代理商/技术参数 |
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|---|---|
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| T-APD1126DN-R | 制造商:IDEC CORPORATION 功能描述:T-APD1126DN-R |
| T-APD199N-A-120V | 制造商:IDEC CORPORATION 功能描述:T-APD199N-A-120V |
| T-APD199N-A-24V | 制造商:IDEC CORPORATION 功能描述:T-APD199N-A-24V |
| T-APD199N-G-120V | 制造商:IDEC CORPORATION 功能描述:T-APD199N-G-120V |
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