参数资料
型号: TAS5186DDVR
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 60 W, 6 CHANNEL, AUDIO AMPLIFIER, PDSO44
封装: GREEN, PLASTIC, HTSSOP-44
文件页数: 4/16页
文件大小: 342K
代理商: TAS5186DDVR
www.ti.com
THEORY OF OPERATION
POWER SUPPLIES
SYSTEM POWER-UP/DOWN SEQUENCE
Powering Down
Error Reporting
TAS5186
SLES136 – MAY 2005
decoupled with a 100-nF ceramic capacitor placed as
close as possible to each supply pin on the same
side of the PCB as the TAS5186. It is recommended
To facilitate system design, the TAS5186 needs only
to follow the PCB layout of the TAS5186 reference
a
12-V
supply
in
addition
to
a
typical
39-V
design.
For
additional
information
on
the
rec-
power-stage supply. An internal voltage regulator
ommended power supply and required components,
provides suitable voltage levels for the digital and
see the application diagrams given in this data sheet.
low-voltage analog circuitry. Additionally, all circuitry
The
12-V
supply
should
be
powered
from
a
requiring a floating voltage supply, e.g., the high-side
low-noise, low-output-impedance voltage regulator.
gate drive, is accommodated by built-in bootstrap
Likewise, the 39-V power-stage supply is assumed to
circuitry requiring only a few external capacitors.
have low output impedance and low noise. The
power-supply sequence is not critical due to the
In order to provide outstanding electrical and acoustic
internal
power-on-reset
circuit.
Moreover,
the
characteristics, the PWM signal path including gate
TAS5186
is
fully
protected
against
erroneous
drive and output stage is designed as identical,
power-stage turnon due to parasitic gate charging.
independent half-bridges. For this reason, each
Thus, voltage-supply ramp rates (dv/dt) are typically
half-bridge has separate bootstrap pins (BST_X) and
noncritical.
power-stage supply pins (PVDD_X). Furthermore, an
additional pin (VDD) is provided as power supply for
all common circuits. Although supplied from the same
12-V source, it is highly recommended to separate
The TAS5186 does not require a power-up sequence.
GVDD_X and VDD on the printed-circuit board (PCB)
The
outputs
of
the
H-bridge
remain
in
a
by RC filters (see application diagram for details).
high-impedance state until the gate-drive supply volt-
These
RC
filters
provide
the
recommended
age (GVDD_X) and VDD voltage are above the
high-frequency isolation. Special attention should be
undervoltage protection (UVP) voltage threshold (see
paid to placing all decoupling capacitors as close to
the Electrical Characteristics section of this data
their associated pins as possible. In general, induct-
sheet). Although not specifically required, it is rec-
ance between the power-supply pins and decoupling
ommended to hold RESET in a low state while
capacitors must be avoided. (See reference board
powering up the device.
documentation for additional information.)
When the TAS5186 is being used with TI PWM
For a properly functioning bootstrap circuit, a small
modulators such as the TAS5086, no special atten-
ceramic capacitor must be connected from each
tion to the state of RESET is required, provided that
bootstrap pin (BST_X) to the power-stage output pin
the chipset is configured as recommended.
(OUT_X). When the power-stage output is low, the
bootstrap capacitor is charged through an internal
diode
connected
between
the
gate-drive
power-supply pin (GVDD_X) and the bootstrap pin.
The TAS5186 does not require a power-down se-
When the power-stage output voltage is high, the
quence. The device remains fully operational as long
bootstrap capacitor voltage is shifted above the
as the gate-drive supply (GVDD_X) voltage and VDD
output voltage potential and thus provides a suitable
voltage are above the undervoltage protection (UVP)
voltage supply for the high-side gate driver. In an
threshold level (see the Electrical Characteristics
application with PWM switching frequencies in the
section of this data sheet). Although not specifically
range 352 kHz to 384 kHz, it is recommended to use
required, it is a good practice to hold RESET low
33-nF ceramic capacitors, size 0603 or 0805, for the
during power down, thus preventing audible artifacts
bootstrap capacitor. These 33-nF capacitors ensure
including pops and clicks
sufficient energy storage, even during minimal PWM
When the TAS5186 is being used with TI PWM
duty cycles, to keep the high-side power stage FET
modulators such as the TAS5086, no special atten-
(LDMOS) fully started during all of the remaining part
tion to the state of RESET is required, provided that
of the PWM cycle. In an application running at a
the chipset is configured as recommended.
reduced switching frequency, generally 250 kHz to
192 kHz, the bootstrap capacitor might need to be
increased in value. Special attention should be paid
to the power-stage power supply; this includes
The
SD
and
OTW
pins
are
both
active-low,
component selection, PCB placement and routing. As
open-drain outputs. Their function is for protec-
indicated,
each
half-bridge
has
independent
tion-mode signaling to a PWM controller or other
power-stage supply pins (PVDD_X). For optimal elec-
system-control device.
trical performance, EMI compliance, and system re-
liability it is important that each PVDD_X pin is
12
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