参数资料
型号: TAS5508PAGR
厂商: TEXAS INSTRUMENTS INC
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封装: GREEN, PLASTIC, TQFP-64
文件页数: 53/105页
文件大小: 1286K
代理商: TAS5508PAGR
3.4.1
PLL Operation
3.5
Bank Controls
TAS5508
8-Channel Digital Audio PWM Processor
www.ti.com
SLES091D – FEBRUARY 2004 – REVISED JULY 2009
The TAS5508 operates with the serial data interface signals LRCLK and SCLK synchronized to MCLK.
However, there is no constraint as to the phase relationship of these signals. The TAS5508 accepts a
64
= Fs SCLK rate and a 1 = Fs LRCLK.
If the phase of SCLK or LRCLK drifts more than
=10 MCLK cycles since the last reset, the TAS5508
senses a clock error and resynchronizes the clock timing.
The clock and serial data interface have several control parameters:
MCLK ratio (64 Fs, 128 Fs, 196 Fs, 256 Fs, 384 Fs, 512 Fs, or 768 Fs) – I2C parameter
Data rate (32, 38, 44.1,48, 88.2, 96, 176.4, 192 kHz) – I2C parameter
AM mode enable/disable – I2C parameter
During AM interference avoidance, the clock control circuitry uses three other configuration inputs:
Tuned AM frequency (for AM interference avoidance) (550 - 1750 kHz) – I2C parameter
Frequency set select (1–4) – I2C parameter
Sample rate – I2C parameter or auto-detected
The TAS5508 uses two internal clocks generated by two internal phase-locked loops (PLLs), the digital
PLL (DPLL) and the analog PLL (APLL). The APLL provides the reference clock for the PWM. The DPLL
provides the reference clock for the digital audio processor and the control logic.
The master clock MCLK input provides the input reference clock for the APLL. The external 13.5-MHz
crystal provides the input reference clock for the DPLL. The crystal provides a time base to support a
number of operations, including the detection of the MCLK ratio, the data rate, and clock error conditions.
The crystal time base provides a constant rate for all controls and signal timing.
Even if MCLK is not present, the TAS5508 can receive and store I2C commands and provide status.
The TAS5508 permits the user to specify and assign sample-rate-dependent parameters for biquad,
loudness, DRC, and tone in one of three banks that can be manually selected or selected automatically
based on the data sampling rate. Each bank can be enabled for one or more specific sample rates via I2C
bank control register 0x40. Each bank set holds the following values:
Coefficients for seven biquads (7 = 5 = 35 coefficients) for each of the eight channels (registers
0x51–0x88)
Coefficients for one loudness biquad (register 0x95)
DRC1 energy and (1 – energy) values (register 0x98)
DRC1 attack, (1 – attack), decay, (1 – decay) values (register 0x9C)
DRC2 energy and (1 – energy) values (register 0x9D)
DRC2 attack, (1 – attack), decay, (1 – decay) values (register 0xA1)
Five bass filter-set selections (register 0xDA)
Five treble filter-set selections (register 0xDC)
The default selection for bank control is manual bank with bank 1 selected. Note that if bank switching is
used, bank 2 and bank 3 must be programmed on power up, because the default values are all zeroes. If
bank switching is used and bank 2 and bank 3 are not programmed correctly, then the output of the
TAS5508 could be muted when switching to those banks.
TAS5508 Controls and Status
51
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