参数资料
型号: TC1271ALCVCTTR
厂商: Microchip Technology
文件页数: 24/48页
文件大小: 0K
描述: IC RESET MONITOR 4.63V SOT23A-5
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 17.5 ms
电压 - 阀值: 4.63V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 标准包装
产品目录页面: 662 (CN2011-ZH PDF)
其它名称: TC1271ALCVCTDKR
TC1270A/70AN/71A
4.5
Reset Generator Circuit
4.5.2
EFFECT OF TEMPERATURE ON
The output signals from the voltage detect circuit and
the manual Reset with glitch filter circuit are OR’d
together and used to activate the Reset generator
module.
After the Reset conditions have been removed (the MR
pin is no longer forced low and the input voltage is
greater than the trip point voltage), the Reset generator
RESET POWER-UP TIMER (t RPU )
The Reset Delay Timer time-out period (t RST )
determines how long the device remains in the Reset
condition. This time out is affected by the device V DD
and the temperature. Typical responses for varying
V DD values and temperatures are presented in
Figures 2-28 , 2-29 and 2-30 .
circuit determines the Reset delay time-out required.
There are three options for the delay circuit. These are:
TABLE 4-4:
RESET DELAY TIMER
TIME OUTS
? 2.19 ms (typical) delay
? 35 ms (typical) delay
t RST
Units
? 280 ms (typical) delay
Min
Typ
Max
4.5.1 RESET DELAY TIMER
The Reset Delay Timer ensures that the TC127XA
device will “hold” the embedded system in Reset until
the system voltage has stabilized. The Reset Delay
Timer time-out is shown in Table 4-4 .
The Reset Delay Timer starts when the voltage detect
circuit output AND the manual Reset with glitch filter
circuit output become inactive. While the Reset Delay
Timer is active, the RST or RST pin is driven to the
active state. When the Reset Delay Timer times out,
the RST or RST pin is driven inactive.
1.09
17.5
140
?
This is the
minimum time that
the Reset Delay
Timer will “hold”
the Reset pin
active after V DD
rises above V TRIP
2.19
35
280
4.38
70
560
?
This is the
maximum time that
the Reset Delay
Timer will “hold”
the Reset pin
active after V DD
rises above V TRIP
ms
ms
ms
The Reset Delay Timer (t RST ) starts after the device
voltage rises above the “actual” trip point (V TRIP ).
When the Reset Delay Timer times out, the Reset out-
put pin (RST/RST) is driven inactive.
The Reset Delay Timer is cleared if either, or both, the
voltage detector circuit output and the manual Reset
with glitch filter circuit output become active. The RST
or RST pin continues to be driven to the active state.
Figure 4-12 illustrates when the Reset Delay Timer
(t RST ) is active or inactive.
Note 1:
V DD
V TRIP
RST
Shaded rows are custom-ordered time
outs.
t RST
Reset
Delay
Reset Delay
Timer Inactive
See Figures 2-9 ,
2-7 and 2-8
Timer
Inactive
See Figures 2-9 ,
2-7 and 2-8
See Figures 2-12 , 2-11 and 2-10
DS22035D-page 24
FIGURE 4-12:
Waveform.
Reset Power-up Timer
? 2007-2011 Microchip Technology Inc.
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