参数资料
型号: TC1271ALCVCTTR
厂商: Microchip Technology
文件页数: 27/48页
文件大小: 0K
描述: IC RESET MONITOR 4.63V SOT23A-5
标准包装: 1
类型: 简单复位/加电复位
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 高有效
复位超时: 最小为 17.5 ms
电压 - 阀值: 4.63V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SC-74A,SOT-753
供应商设备封装: SOT-23-5
包装: 标准包装
产品目录页面: 662 (CN2011-ZH PDF)
其它名称: TC1271ALCVCTDKR
TC1270A/70AN/71A
5.6
Controllers and Processors With
5.8
Reset Signal Integrity During
Bidirectional I/O Pins
Some microcontrollers have bidirectional Reset pins.
Depending on the current drive capability of the
controller pin, an indeterminate logic level may result if
there is a logic conflict. This can be avoided by adding
a 4.7 k ? resistor in series with the output of the
TC127XA ( Figure 5-7 ). If there are other components
in the system that require a Reset signal, they should
be buffered so as not to load the Reset line. If the other
components are required to follow the Reset I/O of the
microcontroller, the buffer should be connected as
shown with the solid line.
Power-Down
The TC1270A and TC1271A Reset output is valid
down to V DD = 1.0V. Below this voltage the output
becomes an “open circuit” and does not sink current.
This means CMOS logic inputs to the microcontroller
will be floating at an undetermined voltage. Most digital
systems are completely shut down well above this volt-
age. However, in situations where the Reset signal
must be maintained valid to V DD = 0V, external circuitry
is required.
For devices where the Reset signal is active-low, a
pull-down resistor must be connected from the
TC1270A RST pin to ground to discharge stray
capacitances and hold the output low ( Figure 5-9 ).
V DD
V DD
TC1270A/71A
V DD
Buffered
Reset to
system
Similarly for devices where the Reset signal is
active-high, a pull-up resistor to V DD is required to
ensure a valid high RST signal for V DD below 1.0V
This resistor value, though not critical, should be
chosen such that it does not appreciably load the Reset
MR
V SS
RST
or
RST 4.7 k ?
Reset I/O
V SS
pin under normal operation (100 k ? should be suitable
for most applications).
V DD
V DD
FIGURE 5-7:
Interfacing the TC1270A or
TC1270A
TC1271A Push-Pull Output to a Bidirectional
Reset I/O pin.
5.7
Migration Paths
Figure 5-8 shows the 5-pin SOT-23 footprint of the
MR
V SS
RST
R 1
100 k ?
TC1270A, TC1270AN and TC1271A devices. Devices
that are in the 3-pin SOT-23 package could be used in
that circuit with the loss of manual Reset functionality.
Examples of compatible footprint devices in the SOT-
23-3 package are the MCP111, MCP112, TC54 and
TC51 devices. This allows the system to be designed
to offer a “base” functionality and a higher end system
with the “enhanced” functionality, which includes a
FIGURE 5-9: Ensuring a valid active-low
Reset pin output state as V DD approaches 0V.
V DD
V DD
manual Reset.
TC1271A
RST
MR
R 1
100 k ?
SOT-23- 5
SOT-23- 3
V SS
NC
1
5
V SS
2
V SS
V DD
MR
2
3
4
RST
or
RST
V DD
3
1
RST
or
RST
FIGURE 5-10: Ensuring a valid active-high
Reset pin output state as V DD approaches 0V.
FIGURE 5-8:
Comparison.
SOT-23 5-pin to 3-pin
? 2007-2011 Microchip Technology Inc.
DS22035D-page 27
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