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| 型号： | TC4469MJD |
| 厂商： | Microchip Technology |
| 文件页数： | 4/22页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET DVR AND/INV 14CDIP |
| 标准包装： | 29 |
| 配置： | 低端 |
| 输入类型： | 反相和非反相 |
| 延迟时间： | 40ns |
| 电流 - 峰： | 1.2A |
| 配置数： | 4 |
| 输出数： | 4 |
| 电源电压： | 4.5 V ~ 18 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 14-CDIP（0.300"，7.62mm） |
| 供应商设备封装： | 14-CERDIP |
| 包装： | 管件 |
TC4467/TC4468/TC4469
ELECTRICAL SPECIFICATIONS (OPERATING TEMPERATURES)
Electrical Characteristics: Unless otherwise noted, over operating temperature range with 4.5 V ≤ V DD ≤ 18 V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input
Logic 1, High Input Voltage
Logic 0, Low Input Voltage
Input Current
V IH
V IL
I IN
2.4
—
-10
—
—
—
—
0.8
10
V
V
μA
Note 3
Note 3
0 V ≤ V IN ≤ V DD
Output
High Output Voltage
Low Output Voltage
Output Resistance
Peak Output Current
Continuous Output Current
V OH
V OL
R O
I PK
I DC
V DD – 0.025
—
—
—
—
—
—
20
1.2
—
—
0.30
30
—
300
V
V
?
A
mA
I LOAD = 100 μA (Note 1)
I LOAD = 10 mA (Note 1)
I OUT = 10 mA, V DD = 18 V
Single Output
—
—
500
Total Package
Latch-Up Protection Withstand
Reverse Current
I
—
500
—
mA
4.5 V ≤ V DD ≤ 16 V
Switching Time (Note 1)
Rise Time
Fall Time
Delay Time
Delay Time
t R
t F
t D1
t D2
—
—
—
—
15
15
40
40
50
50
100
100
nsec
nsec
nsec
nsec
Figure 4-1
Figure 4-1
Figure 4-1
Figure 4-1
Power Supply
Power Supply Current
I S
—
—
8
mA
Power Supply Voltage
V DD
4.5
—
18
V
Note 2
Note
1:
2:
3:
Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching
times are ensured by design.
When driving all four outputs simultaneously in the same direction, V DD will be limited to 16 V. This reduces the chance that internal dv/dt
will cause high-power dissipation in the device.
The input threshold has approximately 50 mV of hysteresis centered at approximately 1.5 V. Input rise times should be kept below 5 μsec
to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below
the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.
TRUTH TABLE
Part No.
TC4467 NAND
TC4468 AND
TC4469 AND/INV
Inputs A
Inputs B
Outputs TC446X
H
H
L
H
L
H
L
H
H
L
L
H
H
H
H
H
L
L
L
H
L
L
L
L
H
H
L
H
L
H
L
H
L
L
L
L
Legend: H = High
DS21425B-page 4
L = Low
? 2002 Microchip Technology Inc.
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