参数资料
型号: TC530CPJ
厂商: Microchip Technology
文件页数: 3/28页
文件大小: 0K
描述: IC DATA ACQ SUBSYSTEM 28DIP
标准包装: 15
类型: 数据采集系统(DAS)
分辨率(位): 17 b
采样率(每秒): 6.5
数据接口: 串行
电压电源: 单电源
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 28-DIP(0.300",7.62mm)
供应商设备封装: 28-DIP
包装: 管件
其它名称: Q1000542A
2007 Microchip Technology Inc.
DS21433C-page 11
TC530/TC534
4.3
Input Integrate Phase (INT)
In this phase, a current directly proportional to differen-
tial input voltage is sourced into integrating capacitor
CINT. The amount of voltage stored on CINT at the end
of the INT phase is directly proportional to the applied
differential input voltage. Input signal polarity (sign bit)
is determined at the end of this phase. Converter
resolution and speed is a function of the duration of the
INT phase, which is programmable by the user via the
Duration”, AZ and INT Phase Duration). The shorter
the integration time, the faster the speed of conversion
(but the lower the resolution). Conversely, the longer
the integration time, the greater the resolution (but at
slower the speed of conversion).
4.4
Reference De-integrate Phase
(DINT)
This phase consists of measuring the time for the
integrator output to return (at a rate determined by the
external reference voltage) from its initial voltage to 0V.
The resulting timer data is stored in the output shift
register as converted analog data.
4.5
Integrator Output Zero Phase (IZ)
This phase ensures the integrator output is at zero volts
when the AZ phase is entered so that only true system
offset voltages will be compensated for.
All internal converter timing is derived from the
frequency source at OSCIN and OSCOUT. This
frequency source must be either an externally provided
clock signal or an external crystal. If an external clock
is used, it must be connected to the OSCIN pin and the
OSCOUT pin must remain floating. If a crystal is used, it
must be connected between OSCIN and OSCOUT and
be physically located as close to the OSCIN and
OSCOUT pins as possible. In either case, the incoming
clock frequency is divided by four, with the resulting
clock serving as the internal TC530/TC534 timebase.
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