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参数资料
| 型号： | TC7126RIPL |
| 元件分类： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP40 |
| 封装： | REVERSE, PLASTIC, DIP-40 |
| 文件页数： | 26/26页 |
| 文件大小： | 413K |
| 代理商： | TC7126RIPL |
2006 Microchip Technology Inc.
DS21458C-page 9
TC7126/A
3.0
DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP.)
3.1
Dual Slope Conversion Principles
The TC7126A is a dual slope, integrating analog-to-
digital converter. An understanding of the dual slope
conversion technique will aid in following the detailed
TC7126/A operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
Input Signal Integration
Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a
fixed time period (TSI). Time is measured by counting
clock pulses. An opposite polarity constant reference
voltage is then integrated until the integrator output
voltage returns to zero. The reference integration time
is directly proportional to the input signal (TRI) (see
Figure ).
FIGURE 3-1:
Basic Dual Slope Converter
In a simple dual slope converter, a complete conver-
sion requires the integrator output to “ramp-up” and
“ramp-down.”
A simple mathematical equation relates the input
signal, reference voltage and integration time:
EQUATION 3-1:
For a constant VIN:
EQUATION 3-2:
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte-
grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation convert-
ers in high noise environments. Interfering signals with
frequency components at multiples of the averaging
period will be attenuated. Integrating ADCs commonly
operate with the signal integration period set to a
multiple of the 50Hz/60Hz power line period (see
FIGURE 3-2:
Normal Mode Rejection of
Dual Slope Converter
+
–
REF
Voltage
Analog
Input
Signal
+
–
Display
Switch
Driver
Control
Logic
Integrator
Output
Clock
Counter
Polarity Control
Phase
Control
VIN VREF
VIN 1.2 VREF
Variable
Reference
Integrate
Time
Fixed
Signal
Integrate
Time
Integrator
Comparator
Where:
VR = Reference voltage
TSI = Signal integration time (fixed)
TRI = Reference voltage integration time (variable)
1
RC
TSI
0
VIN(t)dt =
∫
VRTRI
RC
V
IN
V
R
T
RI
T
SI
-------
=
30
20
10
0
Normal
Mode
Rejection
(dB)
0.1/t
1/t
10/t
Input Frequency
t = Measurement Period
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