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| 型号： | TC820CLW |
| 元件分类： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 5/28页 |
| 文件大小： | 616K |
| 代理商： | TC820CLW |
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2002 Microchip Technology Inc.
DS21476B-page 13
TC820
When the logic probe function is selected while FREQ/
VOLTS is low (A/D mode), the ADC will remain in the
Auto-Zero mode. The LCD will read "OL" and all
decimal points will be off (Figure 3-6).
FIGURE 3-6:
If the logic probe is active while FREQ/VOLTS is high
(Counter mode), the frequency counter will continue to
operate. The display will read "OL" but the decimal
points will be visible. If the logic probe input is also con-
nected to the RANGE/FREQ input, bringing the LOGIC
input low will immediately display the frequency at the
logic probe input.
3.5
Analog Pin Functional Description
3.5.1
DIFFERENTIAL SIGNAL INPUTS
(VIN+), (VIN-)
The TC820 is designed with true differential inputs, and
accepts input signals within the Input Stage Common
mode voltage (VCM) range. The typical range is
VDD –1V to VSS + 1.5V. Common mode voltages are
removed from the system when the TC820 operates
from a battery or floating power source (isolated from
measured system) and VSS is connected to analog
common(see Figure3-7).
In systems where Common mode voltages exist, the
86dB Common mode rejection ratio minimizes error.
Common mode voltages do, however, affect the inte-
grator output level. A worst case condition exists if a
large, positive VCM exists in conjunction with a full
scale, negative differential signal. The negative signal
drives the integrator output positive along with VCM
(Figure 3-8). For such applications, the integrator out-
put swing can be reduced below the recommended 2V
full scale swing. The integrator output will swing within
0.3V of VDD,or VDD without increased linearity error.
3.5.2
REFERENCE (VDD,VSS)
The TC820 reference, like the analog signal input, has
true differential inputs. In addition, the reference volt-
age can be generated anywhere within the power sup-
ply voltage of the converter. The differential reference
inputs permit ratiometric measurements and simplify
interfacing with sensors, such as load cells and temper-
ature sensors.
To prevent rollover type errors from being induced by
large Common mode voltages, CREF should be large
compared to stray node capacitance. A 0.1
F capacitor
is typical.
The TC820 offers a significantly improved analog com-
mon temperature coefficient, providing a very stable
voltage suitable for use as a voltage reference. The
temperature coefficient of analog common is typically
35ppm/°C.
3.5.3
ANALOG COMMON
The analog common pin is set at a voltage potential
approximately 3.3V below VDD. This potential is
between 3.15V and 3.45V below VDD. Analog common
is tied internally to an N-channel FET capable of sink-
ing 3mA. This FET will hold the common line at 3.3V
below VDD should an external load attempt to pull the
commonlinetowardVDD. Analog common source cur-
rent is limited to 12
A, and is, therefore, easily pulled to
a more negative voltage (i.e., below VDD –3.3V).
The TC820 connects the internal VIN+ and VIN- inputs
to analog common during the auto-zero cycle. During
the reference integrate phase, VIN- is connected to
analog common. If VIN- is not externally connected to
analog common, a Common mode voltage exists.
This is rejected by the converter's 86dB Common mode
rejection ratio. In battery powered applications, analog
common and VIN- are usually connected, removing
Common mode voltage concerns. In systems where
VIN- is connected to the power supply ground or to a
given voltage, analog common should be connected to
VIN-.
The analog common pin serves to set the analog sec-
tion reference or common point. The TC820 is specifi-
cally designed to operate from a battery, or in any
“measurement" system where input signals are not ref-
erenced (float), with respect to the TC820 power
source. The analog common potential of VDD –3.3V
gives a 7V end of battery life voltage. The analog com-
mon potential has a voltage coefficient of 0.001%.
With
a
sufficiently
high
total
supply
voltage
(VDD –VSS > 7V), analog common is a very stable
potential with excellent temperature stability (typically
35ppm/°C). This potential can be used to generate the
TC820 reference voltage. An external voltage refer-
ence will be unnecessary in most cases, because of
the 35ppm/°C temperature coefficient. See the applica-
tions section for details.
High
Low
*
**
* "High" Annuciator will be on when DP1/HI = Logic High
** "Low" Annunciator and Buzzer will be on when DP0/LO = Logic High
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