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参数资料
| 型号： | TDA1310AT-T |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 0.2 us SETTLING TIME, 16-BIT DAC, PDSO8 |
| 封装： | PLASTIC, SOT-96AG, SO-8 |
| 文件页数： | 15/16页 |
| 文件大小： | 114K |
| 代理商： | TDA1310AT-T |
May 1994
8
Philips Semiconductors
Preliminary specication
Stereo Continuous Calibration DAC
(CC-DAC)
TDA1310A
Notes
1. Vripple = 1% of supply voltage; fripple = 100 Hz.
2. Measured with 1 kHz sine wave generated at sampling rate of 192 kHz.
(THD+N)/S
total harmonic distortion plus
noise-to-signal ratio
at 0 dB signal level;
note 2
65
61
dB
0.05
0.08
%
at
60 dB signal level;
note 2
30
24
dB
36
%
at
60 dB signal level;
A-weighted; note 2
33
dB
2.2
%
at
60 dB signal level;
A-weighted; note 2;
R3 =R4=11 k
;
see Fig.1; IFS =2mA
1.7
%
at 0 dB signal level;
f = 20 Hz to 20 kHz
65
61
dB
0.05
0.08
%
tcs
current settling time to
±1 LSB
0.2
s
αcs
channel separation
86
95
dB
|I
O|
unbalance between outputs
IOL and IOR
note 1
0.2
0.3
dB
|t
d|
time delay between outputs
IOL and IOR
±0.2
s
S/N
signal-to-noise ratio at bipolar
zero
A-weighted at code
0000H
86
92
dB
A-weighted; IFS = 2 mA;
R3 =R4=11 k
;
see Fig.1
95
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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