参数资料
型号: TDF8554J/N4
厂商: NXP SEMICONDUCTORS
元件分类: 音频/视频放大
英文描述: 44 W, 4 CHANNEL, AUDIO AMPLIFIER, PZFM37
封装: PLASTIC, SOT725-1, 37 PIN
文件页数: 2/56页
文件大小: 597K
代理商: TDF8554J/N4
TDF8554J
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 31 August 2011
10 of 56
NXP Semiconductors
TDF8554J
4
45 W power amplifier with multiple voltage regulator
This ensures that at low supply voltage the undistorted output power is maximized. If the
battery voltage is above 10 V the DC-output voltage relates to the SVR voltage and is
filtered for supply ripple again.
The DC input voltage follows the supply voltage slowly (SVR capacitor) to prevent audible
plops, even during engine start.
If the battery voltage drops below 6 V, low VP mute is activated. During the low VP mute
the amplifier fast mutes (approximately 400
s). When mute is completed, the capacitor
on pin ACGND and on pin SVR are both discharged to prevent audible plops. If the
battery voltage rises again above the low VP mute threshold (6 V), and there has been no
Power-On Reset (POR) (DB2[D7]) = 1, the amplifier starts automatically. The amplifier
only restarts if the SVR capacitor has been discharged to 0.7 V to prevent a start-up plop.
If the battery voltage has dropped too much that the internal registers lose their
information, a POR occurs and the amplifier will not restart automatically. Pin DIAG is
pulled LOW to indicate a POR has occurred.
The device prevents amplifier plops during engine start. To prevent plops on the amplifier
output caused by, for instance, a tuner regulator out of regulation, the voltage on pin STB
can be made zero when an engine start is detected. Pin STB activates the fast mute,
suppressing disturbances at the amplifier inputs.
The built-in low battery mute voltage default is set to 5.5 V, but can also be set to 7.2 V via
the I2C-bus.
When the low battery voltage mute is set to 7.2 V, the amplifier activates the fast mute
(400
s) and enters the same cycle when the low V
P mute was set to 5.5 V: discharge of
the ACGND and SVR capacitors when the mute is completed and start-up when the
supply voltage is above 8 V, when no POR has occurred.
7.3 POR behavior
If the supply voltage drops below 4.5 V, the content of the I2C latches cannot be
guaranteed and POR is activated at a typical VP level of 3.1 V. All latches are reset, the
amplifier is switched off and pin DIAG is pulled LOW to indicate that a POR has occurred
(DB2[D7] = 1). If IB1[D0] is set, the power-on flag is reset, pin DIAG is released and the
amplifier starts.
Fig 4.
Engine start protection
amplifier re-start
(depends on
I2C-bus content)
t (s)
001aam687
VP
voltage
(V)
14
10
7
6
3.5
UVP
DC output voltage
SVR voltage/DC input voltage
t(start-Vo(off))
t(start-SVRoff)
DC voltage output
not filtered to ensure
headroom
SVR clamp voltage
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