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| 型号： | TEA5760UK/N1/S21,1 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA25 |
| 封装： | 3 X 2.80 MM, 0.60 MM HEIGHT, WLCSP-25 |
| 文件页数： | 37/37页 |
| 文件大小： | 209K |
| 代理商： | TEA5760UK/N1/S21,1 |
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TEA5760UK_1
NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 14 December 2006
8 of 36
NXP Semiconductors
TEA5760UK
Single chip FM stereo radio
6.12.3 Audio Frequency Mute (AFM)
With bit AFM in register TNCTRL (see Table 13), the audio signal can be muted. The
audio pins maintain their functional impedance and DC-biasing level while the audio
signal is muted. The audio frequency mute is automatically activated during preset as well
as search tuning modes as shown in the owchart of Figure 3.
6.13 MPX decoder
The PLL stereo decoder is adjustment free. The stereo decoder can be switched to mono
via the control interface.
6.14 Signal depending mono/stereo blend (stereo noise cancellation)
With decreasing RF input level the MPX decoder blends from stereo to mono to limit the
output noise. The continuous mono-to-stereo blend can also be programmed via the
control interface to an RF level depending on the switched mono-to stereo transition.
Stereo Noise Cancellation (SNC) can be switched on/off via the control interface using bit
SNC in register TNCTRL (see Table 13). The RF input voltage where blending starts can
be switched with bit SNCLEV in register TESTREG (see Table 20).
6.15 Software programmable port
One software programmable port (CMOS output) is available and can be controlled via
the control interface.
Bit SWPM = 1; the software port (SWPORT) functions as the output for bit FRRFLAG
Bit SWPM = 0; the software port outputs bit SWP of the registers
In software test mode the software port outputs signals according to Table 21. Software
test mode is selected setting bit TM of register TESTREG. The software port is not
disabled by bit PUPD (see Section 6.16).
6.16 Standby
With the Power-Up/Power-Down (PUPD) bit the radio can be put in Standby mode.
Standby mode is dened as where the TEA5760UK has all supply voltages available but
the circuits are powered down via software or after power-on reset. The TEA5760UK is
still accessible via the control interface, but takes only a very limited amount of power from
the supply. The software programmable port remains active to allow peripheral devices to
be controlled. The audio outputs are hard muted.
When pin BUSEN is HIGH and the circuits are powered down via software (PUPD) the
TEA5760UK is in Sleep mode. In Sleep mode the TEA5760UK is accessible via the
I2C-bus, but the radio part is not active. The digital supply current (ICCD) is higher than in
Standby mode.
When the supply voltage VCCA and VCCD are at 0 V and pin VREFDIG is HIGH, all I/Os,
the audio outputs and the reference clock input are high-ohmic.
The power supplies can be switched on in any order.
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