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参数资料
| 型号： | TFP401CPZP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, POWER, THERMALLY ENHANCED, PLASTIC, TQFP-100 |
| 文件页数： | 20/22页 |
| 文件大小： | 285K |
| 代理商： | TFP401CPZP |
TFP401, TFP401A
TI PanelBus
DIGITAL RECEIVER
SLDS120 - MARCH 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
TYP
MAX
UNIT
Supply voltage, VDD (DVDD, AVDD, PVDD, OVDD)
3
3.3
3.6
V
Pixel time, tpix
6.06
40
ns
Single ended analog input termination resistance, Rt
50
Operating free-air temperature, TA
0
25
70
°C
tpix is the pixel time defined as the period of the RxC clock input. The period of the output clock, ODCK is equal to tpix when in 1-pixel/clock mode
and 2tpix when in 2-pixel/clock mode.
A 500-
external resistor connected from EXT_RES to AVDD sets Rt = 50
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
dc digital I/O specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIH
High level digital input voltage§
2
DVDD
V
VIL
Low level digital input voltage§
0
0.8
V
IOH
High level output drive current
ST = High,
VOH = 2.4 V
TBD
18
TBD
mA
IOH
High level output drive current
ST = Low,
VOH = 2.4 V
TBD
9
TBD
mA
IOL
Low level output drive current
ST = High,
VOL = 0.8 V
TBD
18
TBD
mA
IOL
Low level output drive current
ST = Low,
VOL = 0.8 V
TBD
9
TBD
mA
IOZ
Hi-Z output leakage current
PD = Low or PDO = Low
-10
10
A
VIK(INL)
Input clamp voltage
ICL = -18 mA
DGND-0.8
VIK(IPL)
Input clamp voltage
ICL = 18 mA
DGND+0.8
V
VOK(ONL)
Output clamp voltage
ICL = -18 mA
DGND-0.8
V
VOK(OPL)
Output clamp voltage
ICL = 18 mA
DGND+0.8
§ Digital inputs are labeled DI in I/O column of Terminal Functions Table.
Digital outputs are labeled DO in I/O column of Terminal Functions Table.
dc specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VID
Analog input differential voltage (see Note 3)
150
1200
mv
VIC
Analog input common mode voltage (see Note 3)
AVDD-300
AVDD-37
mv
VI(OC)
Open circuit analog input voltage
AVDD-10
AVDD+10
mv
IDD(2PIX)
Normal 2-pix/clock power supply current (see Note
4)
Pixel Rate = 56 MHz
2-pix/clock, See Note 3
TBD
mA
IPD
Power down current (see Note 5)
PD = Low, See Note 4
TBD
uA
NOTES:
3. Specified as dc characteristic with no overshoot or undershoot.
4. Alternating 2-pixel black/2-pixel white pattern. ST = high, STAG = high, QE[23:0] and QO[23:0] CL = 10 pF.
5. Analog inputs are open circuit (transmitter is disconnected from TFP401/401A).
ADV
ANCE
INFORMA
TION
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