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参数资料
型号： TLC071AIPE4
厂商： TEXAS INSTRUMENTS INC
元件分类： 运算放大器
英文描述： OP-AMP, 2000 uV OFFSET-MAX, 10 MHz BAND WIDTH, PDIP8
封装： ROHS COMPLIANT, PLASTIC, DIP-8
文件页数： 2/53页
文件大小： 1664K
代理商： TLC071AIPE4
TLC070, TLC071, TLC072, TLC073, TLC074, TLC075, TLC07xA
FAMILY OF WIDEBANDWIDTH HIGHOUTPUT DRIVE SINGLE SUPPLY
OPERATIONAL AMPLIFIERS
SLOS219E JUNE 1999 REVISED SEPTEMBER 2006
10
WWW.TI.COM
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
operating characteristics at specified free-air temperature, VDD = 12 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
SR+
Positive slew rate at unity gain
VO(PP) = 2 V,
CL = 50 pF,
25
°C
10
16
V/ s
SR+
Positive slew rate at unity gain
VO(PP) = 2 V,
RL = 10 k
CL = 50 pF,
Full range
9.5
V/
s
SR
Negative slew rate at unity gain
VO(PP) = 2 V,
CL = 50 pF,
25
°C
12.5
19
V/ s
SR
Negative slew rate at unity gain
VO(PP) = 2 V,
RL = 10 k
CL = 50 pF,
Full range
10
V/
s
Vn
Equivalent input noise voltage
f = 100 Hz
25
°C
12
nV/
√Hz
Vn
Equivalent input noise voltage
f = 1 kHz
25
°C
7
nV/
√Hz
In
Equivalent input noise current
f = 1 kHz
25
°C
0.6
fA /
√Hz
VO(PP) = 8 V,
AV = 1
0.002%
THD + N
Total harmonic distortion plus noise
VO(PP) = 8 V,
RL = 10 k and 250 ,
f = 1 kHz
AV = 10
25
°C
0.005%
THD + N
Total harmonic distortion plus noise
RL = 10 k and 250 ,
f = 1 kHz
AV = 100
25 C
0.022%
t(on)
Amplifier turn-on time
RL = 10 k
25
°C
0.47
s
t(off)
Amplifier turn-off time
RL = 10 k
25
°C
2.5
s
Gain-bandwidth product
f = 10 kHz,
RL = 10 k
25
°C
10
MHz
V(STEP)PP = 1 V,
AV = 1,
0.1%
0.17
ts
Settling time
AV = 1,
CL = 10 pF,
RL = 10 k
0.01%
25
°C
0.22
s
ts
Settling time
V(STEP)PP = 1 V,
AV = 1,
0.1%
25
°C
0.17
s
AV = 1,
CL = 47 pF,
RL = 10 k
0.01%
0.29
φm
Phase margin
RL = 10 k,
CL = 50 pF
25
°C
37
°
φm
Phase margin
RL = 10 k,
CL = 0 pF
25
°C
42
°
Gain margin
RL = 10 k,
CL = 50 pF
25
°C
3.1
dB
Gain margin
RL = 10 k,
CL = 0 pF
25
°C
4
dB
Full range is 0°C to 70°C for C suffix and 40°C to 125°C for I suffix. If not specified, full range is 40°C to 125°C.
Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the supply current
has reached half its final value.
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