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参数资料
| 型号： | TLV320AIC26IRHBR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封装： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件页数： | 32/67页 |
| 文件大小： | 883K |
| 代理商： | TLV320AIC26IRHBR |
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TLV320AIC26
SLAS412 DECEMBER 2003
www.ti.com
38
REGISTER 01H: Status Register
BIT
NAME
READ/
WRITE
RESET
VALUE
FUNCTION
D15D14
DAV
R/W
10
Data Available. These two bits program the function of the DAV pin.
00 => Reserved
01 => Acts as data available (Active Low) only. The DAV goes low as soon as one set of ADC
conversion is completed. For scan mode, DAV remains low as long as all the appropriate
registers have not been read out.
10 => Reserved
11 => Reserved
Note: D15D14 should be programmed to 01 for the ’AIC26 to operate correctly.
D13
PWRDN
R
0
AUXADC Power down status
0 => AUXADC is active
1 => AUXADC stops conversion and powers down
D12
R
0
Reserved
D11
DAVAIL
R
0
Data Available Status
0 => No data available.
1 => Data is available(i.e., one set of conversion is done).
Note: This bit is cleared only after all the converted data has been completely read out.
D10D7
R
0000
Reserved
D6
B1STAT
R
0
BAT1 Data Register Status
0 => No new data is available in BAT1 data register
1 => New data is available in BAT1 data register
Note: This bit is cleared only after the converted data of BAT1 has been completely read out of the
register.
D5
B2STAT
R
0
BAT2 Data Register Status
0 => No new data is available in BAT2 data register
1 => New data is available in BAT2 data register
Note: This bit is cleared only after the converted data of BAT2 has been completely read out of the
register.
D4
AXSTAT
R
0
AUX Data Register Status
0 => No new data is available in AUX data register
1 => New data is available in AUX data register
Note: This bit is cleared only after the converted data of AUX has been completely read out of the
register.
D3
R
0
Reserved
D2
T1STAT
R
0
TEMP1 Data Register Status
0 => No new data is available in TEMP1 data register
1 => New data is available in TEMP1 data register
Note: This bit is cleared only after the converted data of TEMP1 has been completely read out of the
register.
D1
T2STAT
R
0
TEMP2 Data Register Status
0 => No new data is available in TEMP2 data register
1 => New data is available in TEMP2 data register
Note: This bit is cleared only after the converted data of TEMP2 has been completely read out of the
register.
D0
R
0
Reserved
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV320AIC26IRHBRG4 | 功能描述:接口—CODEC Lo-Pwr Stereo Codec RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| TLV320AIC27 | 制造商:TI 制造商全称:Texas Instruments 功能描述:STEREO AUDIO CODEC |
| TLV320AIC27CPFB | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TLV320AIC27IPFB | 制造商:TI 制造商全称:Texas Instruments 功能描述:STEREO AUDIO CODEC |
| TLV320AIC27PFB | 制造商:TI 制造商全称:Texas Instruments 功能描述:STEREO AUDIO CODEC |
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