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参数资料
| 型号： | TLV320AIC33IZQER |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| 封装： | 5 X 5 MM, ROHS COMPLIANT, PLASTIC, VFBGA-80 |
| 文件页数： | 15/93页 |
| 文件大小： | 1427K |
| 代理商： | TLV320AIC33IZQER |
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DA(6)
DA(0)
RA(7)
RA(0)
D(7)
D(0)
Start
(M)
7-bit Device Address
(M)
Write
(M)
Slave
Ack
(S)
8-bit Register Address
(M)
Slave
Ack
(S)
8-bit Register Data
(M)
Stop
(M)
Slave
Ack
(S)
SDA
SCL
(M) => SDA Controlled by Master
(S) => SDA Controlled by Slave
DA(6)
DA(0)
RA(7)
RA(0)
Start
(M)
7-bit Device Address
(M)
Write
(M)
Slave
Ack
(S)
8-bit Register Address
(M)
Slave
Ack
(S)
SDA
SCL
DA(6)
DA(0)
7-bit Device Address
(M)
Read
(M)
Slave
Ack
(S)
D(7)
D(0)
8-bit Register Data
(S)
Stop
(M)
Master
No Ack
(M)
Repeat
Start
(M)
(M) => SDA Controlled by Master
(S) => SDA Controlled by Slave
DIGITAL AUDIO DATA SERIAL INTERFACE
SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008 ........................................................................................................................................... www.ti.com
A not-acknowledge is performed by simply leaving SDA HIGH during an acknowledge cycle. If a device is not
present on the bus, and the master attempts to address it, it will receive a not
acknowledge because no device
is present at that address to pull the line LOW.
When a master has finished communicating with a slave, it may issue a STOP condition. When a STOP
condition is issued, the bus becomes idle again. A master may also issue another START condition. When a
START condition is issued while the bus is active, it is called a repeated START condition.
The TLV320AIC33 also responds to and acknowledges a General Call, which consists of the master issuing a
command with a slave address byte of 00H.
Figure 18. I2C Write
Figure 19. I2C Read
In the case of an I2C register write, if the master does not issue a STOP condition, then the device enters
auto-increment mode. So in the next eight clocks, the data on SDA is treated as data for the next incremental
register.
Similarly, in the case of an I2C register read, after the device has sent out the 8-bit data from the addressed
register, if the master issues an ACKNOWLEDGE, the slave takes over control of SDA bus and transmit for the
next 8 clocks the data of the next incremental register.
Audio data is transferred between the host processor and the TLV320AIC33 via the digital audio data serial
interface, or audio bus. The audio bus on this device is very flexible, including left or right justified data options,
support for I2S or PCM protocols, programmable data length options, a TDM mode for multichannel operation,
very flexible master/slave configurability for each bus clock line, and the ability to communicate with multiple
devices within a system directly.
The data serial interface uses two sets of pins for communication between external devices, with the particular
pin used controlled through register programming. This configuration is shown in Figure 20 below.
22
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC33
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PDF描述 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV320AIC33NIZQE | 制造商:Texas Instruments 功能描述: |
| TLV320AIC33NIZQER | 制造商:Texas Instruments 功能描述: |
| TLV320AIC33RHBRG4 | 制造商:Texas Instruments 功能描述:CODEC - Tape and Reel |
| TLV320AIC34 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY |
| TLV320AIC34_1 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY |
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