参数资料
| 型号： | TLV70018QDDCRQ1 |
| 厂商： | Texas Instruments |
| 文件页数： | 10/19页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V .2A SOT23-5 |
| 标准包装： | 3,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.8V |
| 输入电压： | 2 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 200mA（最小值） |
| 电流 - 限制（最小）： | 320mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-5 细型，TSOT-23-5 |
| 供应商设备封装： | 5-SOT |
| 包装： | 带卷 (TR) |
TLV70018-Q1
SLVSB67A – NOVEMBER 2011 – REVISED MARCH 2012
APPLICATION INFORMATION
The TLV70018-Q1 belongs to a new family of next-
generation value LDO regulators. These devices
consume low quiescent current and deliver excellent
line and load transient performance. These
characteristics, combined with low noise and very
good PSRR with little (V IN – V OUT ) headroom, make
this family of devices ideal for portable RF
applications. This family of regulators offers current
limit and thermal protection, and is specified from
–40°C to +125°C.
INPUT AND OUTPUT CAPACITOR
REQUIREMENTS
1.0- μ F X5R- and X7R-type ceramic capacitors are
recommended because these capacitors have
minimal variation in value and equivalent series
resistance (ESR) over temperature.
However, the TLV70018-Q1 is designed to be stable
with an effective capacitance of 0.1 μ F or larger at
the output. Thus, the device is stable with capacitors
of other dielectric types as well, as long as the
effective capacitance under operating bias voltage
and temperature is greater than 0.1 μ F. This effective
capacitance refers to the capacitance that the LDO
sees under operating bias voltage and temperature
conditions; that is, the capacitance after taking both
bias voltage and temperature derating into
consideration. In addition to allowing the use of lower-
cost dielectrics, this capability of being stable with
0.1- μ F effective capacitance also enables the use of
smaller footprint capacitors that have higher derating
in size- and space-constrained applications.
NOTE: Using a 0.1- μ F rated capacitor at the output
of the LDO does not ensure stability because the
effective capacitance under the specified operating
conditions would be less than 0.1 μ F. Maximum ESR
should be less than 200 m Ω .
Although an input capacitor is not required for
stability, it is good analog design practice to connect
a 0.1- μ F to 1.0- μ F, low ESR capacitor across the IN
pin and GND pin of the regulator. This capacitor
counteracts reactive input sources and improves
IMPROVE PSRR AND NOISE PERFORMANCE
Input and output capacitors should be placed as
close to the device pins as possible. To improve ac
performance such as PSRR, output noise, and
transient response, it is recommended that the board
be designed with separate ground planes for V IN and
V OUT , with the ground plane connected only at the
GND pin of the device. In addition, the ground
connection for the output capacitor should be
connected directly to the GND pin of the device. High
ESR capacitors may degrade PSRR performance.
INTERNAL CURRENT LIMIT
The TLV70018-Q1 internal current limit helps to
protect the regulator during fault conditions. During
current limit, the output sources a fixed amount of
current that is largely independent of the output
voltage. In such a case, the output voltage is not
regulated, and is V OUT = I LIMIT × R LOAD . The PMOS
pass transistor dissipates (V IN – V OUT ) × I LIMIT until
thermal shutdown is triggered and the device turns
off. As the device cools, it is turned on by the internal
thermal shutdown circuit. If the fault condition
continues, the device cycles between current limit
and thermal shutdown. See the Thermal Information
section for more details.
The PMOS pass element in the TLV70018-Q1 has a
built-in body diode that conducts current when the
voltage at OUT exceeds the voltage at IN. This
current is not limited, so if extended reverse voltage
operation is anticipated, external limiting to 5% of the
rated output current is recommended.
SHUTDOWN
The enable pin (EN) is active high. The device is
enabled when voltage at EN pin goes above 0.9 V.
This relatively lower value of voltage required to turn
the LDO on can be exploited to power the LDO with a
GPIO of recent processors whose GPIO Logic 1
voltage level is lower than traditional microcontrollers.
The device is turned off when the EN pin is held at
less than 0.4V. When shutdown capability is not
transient
response,
noise
rejection,
and
ripple
required, EN can be connected to the IN pin.
rejection. A higher-value capacitor may be necessary
if large, fast rise-time load transients are anticipated,
or if the device is not located close to the power
source. If source impedance is more than 2 Ω , a 0.1-
μ F input capacitor may be necessary to ensure
stability.
BOARD LAYOUT RECOMMENDATIONS TO
DROPOUT VOLTAGE
The TLV70018-Q1 uses a PMOS pass transistor to
achieve low dropout. When (V IN – V OUT ) is less than
the dropout voltage (V DO ), the PMOS pass device is
in the linear region of operation and the input-to-
output resistance is the R DS(ON) of the PMOS pass
element. V DO scales approximately with output
current because the PMOS device behaves as a
resistor in dropout.
10
Product Folder Link(s): TLV70012-Q1
Copyright ? 2011–2012, Texas Instruments Incorporated
相关PDF资料 |
PDF描述 |
|---|---|
| TLV70430DBVT | IC REG LDO 3V .15A SOT23-5 |
| TLV803ZDBZT | IC VOLT SUPERVISR 2.25V SOT23-3 |
| TNY280PN | IC OFFLINE SWIT OVP OTP HV 8DIP |
| TOP227Y | IC OFFLINE SWIT PWM OCP HV TO220 |
| TOP250Y | IC OFFLINE SWIT UVLO HV TO220 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TLV70019DDCR | 功能描述:低压差稳压器 - LDO 200mA,Low IQ,LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TLV70019DDCT | 功能描述:低压差稳压器 - LDO 200mA,Low IQ,LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TLV70022DDCR | 功能描述:低压差稳压器 - LDO 200mA,Low IQ,LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TLV70022DDCT | 功能描述:低压差稳压器 - LDO 200mA,Low IQ,LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TLV70025DCKR | 功能描述:低压差稳压器 - LDO 200mALo IQLDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
发布紧急采购，3分钟左右您将得到回复。