参数资料
型号: TLV70018QDDCRQ1
厂商: Texas Instruments
文件页数: 11/19页
文件大小: 0K
描述: IC REG LDO 1.8V .2A SOT23-5
标准包装: 3,000
稳压器拓扑结构: 正,固定式
输出电压: 1.8V
输入电压: 2 V ~ 5.5 V
稳压器数量: 1
电流 - 输出: 200mA(最小值)
电流 - 限制(最小): 320mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
供应商设备封装: 5-SOT
包装: 带卷 (TR)
TLV70018-Q1
As with any linear regulator, PSRR and transient
response are degraded as (V IN – V OUT ) approaches
dropout. This effect is shown in Figure 15 in the
SLVSB67A – NOVEMBER 2011 – REVISED MARCH 2012
The internal protection circuitry of the TLV70018-Q1
has been designed to protect against overload
conditions. It was not intended to replace proper
heatsinking. Continuously running the TLV70018-Q1
into thermal shutdown degrades device reliability.
TRANSIENT RESPONSE
As with any regulator, increasing the size of the
output capacitor reduces over-/undershoot magnitude
POWER DISSIPATION
The ability to remove heat from the die is different for
but increases the duration of the transient response.
each
package
type,
presenting
different
considerations in the printed circuit board (PCB)
P D = (V IN - V OUT ) ′ I OUT
UNDERVOLTAGE LOCKOUT (UVLO)
The TLV70018-Q1 uses an undervoltage lockout
circuit to keep the output shut off until internal
circuitry is operating properly.
THERMAL INFORMATION
Thermal protection disables the output when the
junction temperature rises to approximately +165°C,
allowing the device to cool. When the junction
temperature cools to approximately +145°C, the
output circuitry is again enabled. Depending on power
dissipation, thermal resistance, and ambient
temperature, the thermal protection circuit may cycle
on and off. This cycling limits the dissipation of the
regulator, protecting it from damage as a result of
overheating.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an
inadequate heatsink. For reliable operation, junction
temperature should be limited to +125°C maximum.
To estimate the margin of safety in a complete design
(including heatsink), increase the ambient
temperature until the thermal protection is triggered;
use worst-case loads and signal conditions.
layout. The PCB area around the device that is free
of other components moves the heat from the device
to the ambient air.
Thermal performance data for TLV70018-Q1 were
gathered using the TLV700 evaluation module (EVM),
a 2-layer board with two ounces of copper per side.
The dimensions and layout for the SOT23-5 (DBV)
EVM are shown in Figure 25 and Figure 26 .
Corresponding thermal performance data are given in
Table 1 . Note that this board has provision for
soldering not only the SOT23-5 package on the
bottom layer, but also the SC-70 package on the top
layer. Corresponding thermal performance data is
again given in Table 1 . Using heavier copper
increases the effectiveness in removing heat from the
device. The addition of plated through-holes to heat-
dissipating layers also improves heatsink
effectiveness.
Power dissipation depends on input voltage and load
conditions. Power dissipation (P D ) is equal to the
product of the output current and the voltage drop
across the output pass element, as shown in
(1)
PACKAGE MOUNTING
Solder
pad
footprint
recommendations
for
the
TLV70018-Q1
are
available
from
the
Texas
Instruments web site at www.ti.com .
Table 1. EVM Dissipation Ratings
DERATING
PACKAG
FACTOR ABOVE
BOARD
E
R θ JC
R θ JA
T A = 25°C
T A ≤ 25°C
T A = 70°C
T A = 85°C
T A = 125°C
Low-K
(1)
DDC
90°C/W
280°C/W
3.6 mW/°C
360 mW
200 mW
145 mW
51 mW
High-K (2)
DDC
90°C/W
200°C/W
5.0 mW/°C
500 mW
275 mW
200 mW
106 mW
(1)
(2)
The JEDEC low-K (1s) board used to derive this data was a 3-inch × 3-inch, two-layer board with 2-ounce copper traces on top of the
board.
The JEDEC high-K (2s2p) board used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on top and bottom of the board.
Copyright ? 2011–2012, Texas Instruments Incorporated
Product Folder Link(s): TLV70012-Q1
11
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