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参数资料
| 型号： | TM128160CKFWG |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SPECIFICATION FOR LCD MODULE |
| 中文描述： | 规格液晶模块 |
| 文件页数： | 11/26页 |
| 文件大小： | 290K |
| 代理商： | TM128160CKFWG |
10/25
80-system Bus Interface Timing Characteristics
Normal Write Mode (HWM=0) (Vcc = 2.2 to 2.4 V)
Item
Symbol
Unit
Test Condition
Min
Typ
Max
Write
Read
t
CYCW
t
CYCR
PW
LW
PW
LR
PW
HW
PW
HR
t
WRr, WRf
ns
ns
ns
Figure 2
Figure 2
Figure 2
600
800
90
—
—
—
—
—
—
Bus cycle time
Write low-level pulse width
Read low-level pulse width
ns
Figure 2
350
—
—
Write high-level pulse width
ns
Figure 2
300
—
—
Read high-level pulse width
ns
Figure 2
400
—
—
Write/Read rise/fall time
ns
Figure 2
—
—
25
Set up time (RS to CS*, WR*, RD*)
Address hold time
t
AS
t
AH
t
DSW
t
H
t
DDR
t
DHR
ns
ns
Figure 2
Figure 2
10
5
—
—
—
—
Write data setup time
ns
Figure 2
60
—
—
Write data hold time
ns
Figure 2
15
—
—
Read data delay time
ns
Figure 2
—
—
200
Read data hold time
ns
Figure 2
5
—
—
High-Speed Write Mode (HWM=1) (Vcc = 2.2 to 2.4V)
Item
Symbol
Unit
Test Condition
Min
Typ
Max
Write
Read
t
CYCW
t
CYCR
PW
Lw
PW
LR
PW
HW
PW
HR
t
WRr
,
WRf
ns
ns
ns
Figure 2
Figure 2
Figure 2
200
800
90
—
—
—
—
—
—
Bus cycle time
Write low-level pulse width
Read low-level pulse width
ns
Figure 2
350
—
—
Write high -level pulse width
ns
Figure 2
90
—
—
Read high -level pulse width
ns
Figure 2
400
—
—
Write/Read rise/fall time
ns
Figure 2
—
—
—
Set up time (RS to CS*, WR*, RD*)
Address hold time
t
AS
t
AH
t
DSW
t
H
t
DDR
t
DHR
ns
ns
Figure 2
Figure 2
10
5
—
—
—
—
Write data set up time
ns
Figure 2
60
—
—
Write data hold time
ns
Figure 2
15
—
—
Read data delay time
ns
Figure 2
—
—
—
Read data hold time
ns
Figure 2
5
—
—
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