- 您现在的位置：买卖IC网 > PDF目录382625 > TMP86CK74AFG (Toshiba Corporation) Zener Diode; Application: General; Pd (mW): 500; Vz (V): 20.2 to 21.1; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 PDF资料下载
参数资料
| 型号： | TMP86CK74AFG |
| 厂商： | Toshiba Corporation |
| 英文描述： | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 20.2 to 21.1; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| 中文描述： | 8位微控制器 |
| 文件页数： | 97/182页 |
| 文件大小： | 1525K |
| 代理商： | TMP86CK74AFG |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页当前第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页
Page 87
TMP86CK74AFG
8.3.6
Programmable Pulse Generate (PPG) Output Mode
In the programmable pulse generation (PPG) mode, an arbitrary duty pulse is generated by counting per-
formed in the internal clock. To start the timer, TC1CR<TC1S> specifies either the edge of the input pulse to
the TC1 pin or the command start. TC1CR<MPPG1> specifies whether a duty pulse is produced continuously
or not (one-shot pulse).
When TC1CR<MPPG1> is set to “0” (Continuous pulse generation)
When a match between the up-counter and the TC1DRB value is detected after the timer starts, the
level of the
PPG
pin is inverted and an INTTC1 interrupt request is generated. The up-counter contin-
ues counting. When a match between the up-counter and the TC1DRA value is detected, the level of
the
PPG
pin is inverted and an INTTC1 interrupt request is generated. The up-counter is cleared at
this time, and then continues counting and pulse generation.
When TC1S is cleared to “00” during PPG output, the
PPG
pin retains the level immediately before
the counter stops.
When TC1CR<MPPG1> is set to “1” (One-shot pulse generation)
When a match between the up-counter and the TC1DRB value is detected after the timer starts, the
level of the
PPG
pin is inverted and an INTTC1 interrupt request is generated. The up-counter contin-
ues counting. When a match between the up-counter and the TC1DRA value is detected, the level of
the
PPG
pin is inverted and an INTTC1 interrupt request is generated. TC1CR<TC1S> is cleared to
“00” automatically at this time, and the timer stops. The pulse generated by PPG retains the same
level as that when the timer stops.
Since the output level of the
PPG
pin can be set with TC1CR<TFF1> when the timer starts, a positive or neg-
ative pulse can be generated. Since the inverted level of the timer F/F1 output level is output to the
PPG
pin,
specify TC1CR<TFF1> to “0” to set the high level to the
PPG
pin, and “1” to set the low level to the
PPG
pin.
Upon reset, the timer F/F1 is initialized to “0”.
Note 1: To change TC1DRA or TC1DRB during a run of the timer, set a value sufficiently larger than the count value
of the counter. Setting a value smaller than the count value of the counter during a run of the timer may
generate a pulse different from that specified.
Note 2: Do not change TC1CR<TFF1> during a run of the timer. TC1CR<TFF1> can be set correctly only at initial-
ization (after reset). When the timer stops during PPG, TC1CR<TFF1> can not be set correctly from this
point onward if the PPG output has the level which is inverted of the level when the timer starts. (Setting
TC1CR<TFF1> specifies the timer F/F1 to the level inverted of the programmed value.) Therefore, the
timer F/F1 needs to be initialized to ensure an arbitrary level of the PPG output. To initialize the timer F/F1,
change TC1CR<TC1M> to the timer mode (it is not required to start the timer mode), and then set the PPG
mode. Set TC1CR<TFF1> at this time.
Note 3: In the PPG mode, the following relationship must be satisfied.
TC1DRA > TC1DRB
Note 4: Set TC1DRB after changing the mode of TC1M to the PPG mode.
相关PDF资料 |
PDF描述 |
|---|---|
| TMP86CM23AUG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 20.9 to 21.9; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP86CM27FG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 21.6 to 22.6; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP86CM29BFG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 22.3 to 23.3; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP86CM29BUG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 22.9 to 24.0; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP86CM29LUG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 23.6 to 24.7; Condition Iz at Vz (mA): 2; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TMP86CM23AUG | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
| TMP86CM23UG | 制造商:Toshiba America Electronic Components 功能描述:TLCS870/C 32K ROM, LCD - Rail/Tube |
| TMP86CM25F | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
| TMP86CM27FG | 制造商:Toshiba America Electronic Components 功能描述:TLCS870/C 32K ROM , LCD - Rail/Tube |
| TMP86CM29 | 制造商:TOSHIBA 制造商全称:Toshiba Semiconductor 功能描述:CMOS 8-Bit Microcontroller |
发布紧急采购，3分钟左右您将得到回复。