参数资料
型号: TOP256GN-TL
厂商: Power Integrations
文件页数: 6/50页
文件大小: 0K
描述: IC OFFLINE SWIT PROG OVP 8SMD
产品培训模块: TOPSwitch® HX General Introduction
标准包装: 1
系列: TOPSwitch®-HX
输出隔离: 隔离
频率范围: 119kHz ~ 145kHz
输出电压: 700V
功率(瓦特): 63W
工作温度: -40°C ~ 150°C
封装/外壳: 8-SMD(7 个接脚),鸥形翼
供应商设备封装: SMD-8C
包装: 标准包装
配用: 596-1193-ND - KIT REF DESIGN TOP HX FOR TOP258
其它名称: 596-1182-6
TOP252-262
Pin Functional Description
DRAIN (D) Pin:
High-voltage power MOSFET DRAIN pin. The internal start-up
bias current is drawn from this pin through a switched high-
voltage current source. Internal current limit sense point for
drain current.
CONTROL (C) Pin:
Error amplifier and feedback current input pin for duty cycle
control. Internal shunt regulator connection to provide internal
VOLTAGE MONITOR (V) Pin (Y & M package only):
Input for OV, UV, line feed forward with DC MAX reduction, output
overvoltage protection (OVP), remote ON/OFF and device reset.
A connection to the SOURCE pin disables all functions on this pin.
MULTI-FUNCTION (M) Pin (P & G packages only):
This pin combines the functions of the VOLTAGE MONITOR (V)
and EXTERNAL CURRENT LIMIT (X) pins of the Y package into
one pin. Input pin for OV, UV, line feed forward with DC MAX
bias current during normal operation. It is also used as the
connection point for the supply bypass and auto-restart/
compensation capacitor.
EXTERNAL CURRENT LIMIT (X) Pin (Y, M, E and L package):
Input pin for external current limit adjustment and remote
ON/OFF. A connection to SOURCE pin disables all functions on
this pin.
+
DC
Input
Voltage
D
R LS 4 M ?
V
CONTROL
V UV = I UV × R LS + V V (I V = I UV )
V OV = I OV × R LS + V V (I V = I OV )
For R LS = 4 M ?
V UV = 102.8 VDC
V OV = 451 VDC
DC MAX @100 VDC = 76%
DC MAX @375 VD C = 41%
C
R IL
12 k ?
-
E Package (eSIP-7C)
Y Package (TO-220-7C)
Note: Y package for TOP259-261
Exposed Pad
(Hidden)
Internally
Connected to
SOURCE Pin
Figure 5.
For R IL = 12 k ?
S X I LIMIT = 61%
See Figure 55b for
other resistor values
(R IL ) to select different
I LIMIT values.
TOP254-258 Y and All M/E/L Package Line Sense and Externally Set
Current Limit.
1 2 3 4 5 7
V X C F S D
L Package (eSIP-7F)
Tab Internally
Connected to
SOURCE Pin
+
R LS
4 M ?
V UV = I UV × R LS + V V (I V = I UV )
V OV = I OV × R LS + V V (I V = I OV )
For R LS = 4 M ?
V UV = 102.8 VDC
V OV = 451 VDC
10 S
V
1
1 2 3 4 5 7
V X C F S D
M Package
1 2 3 4 5 7
V X C S G D
Lead Bend
Outward from Drawing
(Refer to eSIP-7F Package
Outline Drawing)
Y Package (TO-220-7C)
Note: Y package for TOP254-258
DC
Input
Voltage
-
D
S
V
CONTROL
X G
R IL
12 k ?
DC MAX @100 VDC = 76%
DC MAX @375 VD C = 41%
C
For R IL = 12 k ?
I LIMIT = 61%
See Figure 55b for
other resistor values
(R IL ) to select different
I LIMIT values.
X
C
2
3
9
8
S
S
Figure 6.
TOP259-261 Y Package Line Sense and External Current Limit.
D
M
C
D
7
5 6
P and G Package
1 8
2 7
6
4 5
S
S
S
S
S
S
Tab Internally
Connected to
SOURCE Pin
1 2 3 4 5 7
V X C S F D
+
DC
Input
Voltage
D
R LS 4 M ?
M
CONTROL
V UV = I UV × R LS + V M (I M = I UV )
V OV = I OV × R LS + V M (I M = I OV )
For R LS = 4 M ?
V UV = 102.8 VDC
V OV = 451 VDC
DC MAX @100 VDC = 76%
DC MAX @375 VDC = 41%
C
PI-4644-091108
-
S
Figure 4.
6
Rev. H 06/13
Pin Configuration (Top View).
Figure 7.
P/G Package Line Sense.
PI-4712-120307
www.powerint.com
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