参数资料
型号: TPA3005D2PHPR
厂商: Texas Instruments
文件页数: 7/31页
文件大小: 0K
描述: IC AMP AUDIO PWR 6W STER 48TQFP
标准包装: 1
类型: D 类
输出类型: 2 通道(立体声)
在某负载时最大输出功率 x 通道数量: 6W x 2 @ 8 欧姆
电源电压: 8.5 V ~ 18 V
特点: 差分输入,短路保护和热保护,关机
安装类型: 表面贴装
供应商设备封装: 48-HTQFP(7x7)
封装/外壳: 48-TQFP 裸露焊盘
包装: 标准包装
产品目录页面: 877 (CN2011-ZH PDF)
配用: 296-18924-ND - EVAL MODULE FOR TPA3005D2
其它名称: 296-17058-6
1 nF
Ferrite
Chip Bead
OUTP
OUTN
Ferrite
Chip Bead
1 nF
Ci
IN
Zi
Zf
Input
Signal
f +
1
2p Z
iCi
www.ti.com
SLOS427A – MAY 2004 – REVISED AUGUST 2010
Figure 19. Typical Ferrite Chip Bead Filter (Chip bead example: Fair-Rite 2512067007Y3)
Gain setting via GAIN0 and GAIN1 inputs
The gain of the TPA3005D2 is set by two input terminals, GAIN0 and GAIN1.
The gains listed in Table 2 are realized by changing the taps on the input resistors inside the amplifier. This
causes the input impedance (Zi) to be dependent on the gain setting. The actual gain settings are controlled by
ratios of resistors, so the gain variation from part-to-part is small. However, the input impedance may shift by
20% due to shifts in the actual resistance of the input resistors.
For design purposes, the input network (discussed in the next section) should be designed assuming an input
impedance of 26 k
, which is the absolute minimum input impedance of the TPA3005D2. At the lower gain
settings, the input impedance could increase as high as 165 k
Table 2. Gain Setting
INPUT IMPEDANCE
AMPLIFIER GAIN (dB)
(k
)
GAIN1
GAIN0
TYP
0
15.3
137
0
1
21.2
88
1
0
27.2
52
1
31.8
33
INPUT RESISTANCE
Each gain setting is achieved by varying the input resistance of the amplifier that can range from its smallest
value, 33 k
, to the largest value, 137 k. As a result, if a single capacitor is used in the input high-pass filter,
the -3 dB or cutoff frequency changes when changing gain steps.
The -3-dB frequency can be calculated using Equation 5. Use Table 2 for Zi values.
(5)
Copyright 2004–2010, Texas Instruments Incorporated
15
Product Folder Link(s): TPA3005D2
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