参数资料
型号: TPABASEKITEVM
厂商: Texas Instruments
文件页数: 21/32页
文件大小: 0K
描述: EVAL MODULE AUDIO AMP PLATFORM
标准包装: 1
主要目的: 音频,音频处理
嵌入式:
已用 IC / 零件: TI's Audio EVM Boards
主要属性: 即插即用立体声设备的插口 / 单声道功率放大器 EVM 板
次要属性: 还可测试输入信号调节 EVM 板,以及耳机放大器 EVM 板
已供物品:
Configuration
3.2.4
3.2.4.1
Muting and Mode
Many TI audio power amplifier EVMs have control inputs that mute the output
and/or change the operating mode (from bridged to single-ended output, for
example) in response to a signal applied to a control input. The typical
application, as often found in notebook computers, portable audio products,
and such, would have the internal speakers mute when headphones are
plugged into the headphone jack, or have internal speakers mute when
external speakers are connected.
In applications using separate speaker and headphone amplifiers, the one not
being used can be shut down (muted) to conserve power. In applications that
use a single power amplifier to run either the speakers or the headphones, or
either the internal speakers or the external speakers, often the amplifier must
switch its output mode to single-ended to be able to cope with the 3-wire
headphone or external speaker connector that returns the signal to ground.
The TI Plug-N-Play Audio Amplifier Evaluation Platform has been designed to
provide complete flexibility in selecting control signal polarity and functionality
for amplifier muting and mode select.
Headphone Jack Control Signals
The platform headphone jack (J10) contains an internal switch that changes
the state of a pair of control lines when a headphone plug is inserted. Each
control line is pulled down by a 1-k ? resistor to ground (R4 and R5). The switch
in the headphone jack pulls one line or the other up to V DD through a 240 ?
resistor (R3) depending on whether a headphone plug is inserted in J10 or not
(Figure 3–3).
Figure 3–3. Mute/Mode Control
VDD
R3
240 ?
JP7
Polarity
JP8
JP6
Mute
U5
Headphone
Amplifier
J10
Headphone
Lo
Mode
U2, U3, U4
Power
Jack
R4
R5
HP
Hi
SPK
Mute
Amplifiers
1 k ?
1 k ?
(U5)
(U2–U4)
A 3-pin jumper header (JP7), functioning as a SPDT switch, selects the control
signal polarity by connecting either the active-low or the active-high line from
the headphone jack to the mute control input of the headphone amplifier
socket, U5.
For the power amplifiers, sockets U2 – U4, a second three-pin jumper header
(JP8) selects the control signal polarity by connecting either the active-low or
the active-high line from the headphone jack to jumper JP6. JP6 connects the
control signal from the headphone jack to either the mute or the mode control
input of the power amplifier sockets.
Details
3-5
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