COUT +
LOUT
I
STEP
2
V
UNDER
Dmax
(V
IN * VOUT)
(21)
COUT +
LOUT
I
STEP
2
V
OVER
V
OUT
(22)
ESR +
V
RIPPLE
I
RIPPLE
(23)
I
CAP(RMS) +
I
OUT * IIN(AVG)
2
)
I
RIPPLE
2
12
D ) IIN(AVG)
2
(1 * D)
(24)
I
QSW(RMS) +
V
OUT
V
IN(MIN)
I
OUT(MAX)
2
)
I
RIPPLE
2
12
(25)
SLUS714D – JANUARY 2007 – REVISED APRIL 2009 ..................................................................................................................................................... www.ti.com
Output Capacitor, COUT, ELCO and MLCC
Several parameters must be considered when selecting the output capacitor. The capacitance value should be
selected based on the output overshoot, VOVER, and undershoot, VUNDER, during a transient load, ISTEP, on the
converter. The equivalent series resistance (ESR) is chosen to allow the converter to meet the output ripple
specification, VRIPPLE. The voltage rating must be greater than the maximum output voltage. Another parameter
to consider is equivalent series inductance, which is important in fast-transient load situations. Also, size and
technology can be factors when choosing the output capacitor. In this design, a large-capacitance electrolytic
type capacitor, COUT ELCO, is used to meet the overshoot and undershoot specifications. Its ESR is chosen to
meet the output ripple specification. Smaller multiple-layer ceramic capacitors, COUT MLCC, are used to filter
high-frequency noise.
The minimum required capacitance and maximum ESR can be calculated using the following equations.
F, and
its ESR should be less than 12 m
. The 470-
F/6.3-V capacitor from Panasonic's FC series was chosen. Its
ESR is 160 m
. MLCCs of 47
F and 22 F/16 V are also added in parallel to achieve the required ESR and to
reduce high-frequency noise.
Input Capacitor, CIN ELCO and MLCC
The input capacitor is selected to handle the ripple current of the buck stage. Also, a relatively large capacitance
is used to keep the ripple voltage on the supply line low. This is especially important where the supply line has
high impedance. It is recommended however, that the supply-line impedance be kept as low as possible.
The input-capacitor ripple current can be calculated using
Equation 24.
IIN(AVG) is the average input current. This is calculated simply by multiplying the output dc current by the duty
cycle. The ripple current in the input capacitor is 3.3 A. An 1812 MLCC using X5R material has a typical
dissipation factor of 5%. For a 22-
F capacitor at 300 kHz, the ESR is approximately 4 m. Two capacitors are
used in parallel, so the power dissipation in each capacitor is less than 11 mW.
A 470-
F/16-V electrolytic is added to maintain the voltage on the input rail.
Switching MOSFET, QSW
The following key parameters must be met by the selected MOSFET.
Drain source voltage, V
ds, must be able to withstand the input voltage plus spikes that may be on the
switching node. For this design a Vds rating of 30 volts is recommended.
Drain current, I
D, at 25°C, must be greater than that calculated using Equation 25. With the parameters specified, the calculation of I
QSW(RMS) should be greater than 5 A.
Gate source voltage, V
gs, must be able to withstand the gate voltage from the control IC. For the TPS40077,
26
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