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C
A +
100 ns
R
A
(2)
Soft-Start
t
SS +
0.7
C
SS
5
10*6
(3)
Overcurrent Protection
V
ILIM + 2.7
I
PH(max)
R
CS
(4)
I
PH(max) +
I
OUT
2
)
V
IN * VOUT
V
OUT
2
L
OUT
f
SW
V
IN
(5)
Current Sense Fault Protection
SLUS602B – JUNE 2004 – REVISED SEPTEMBER 2005
FUNCTIONAL DESCRIPTION (continued)
Even though CA may calculate to less than 1 pF, a capacitance of no more than 4.7 pF is recommended.
A capacitor connected to the soft start pin (SS) sets the power-up time. When EN is high and POR is cleared,
the calibrated current source, U13, starts charging the external soft start capacitor. The PGOOD pin is held low
during the start up. The rising voltage across the capacitor serves as a reference for the error amplifier, U12.
When the soft-start voltage reaches the level of the reference voltage, U8 (VVREF=0.7V), the converter’s output
reaches the regulation point and further voltage rise of the soft start voltage has no effect on the output. When
the soft start voltage reaches 1.0 V, the power good (PGOOD) function is cleared to be reported on the PGOOD
pin. Normally the PGOOD pin goes high at this time.
Equation 3 is used to calculate the value of the soft-start
capacitor.
The overcurrent function, U19, monitors the output of current sense amplifiers U1 and U18. These currents are
converted to voltages and compared to the voltage on the ILIM pin. The relationship between the maximum
phase current and the current sense resistance is given in the following equation. In case a threshold of VILIM/2.7
is exceeded the PWM cycle on the associated phase is terminated. The overcurrent threshold, IPH(max), and the
where
I
PH(max) is a maximum value of the phase current allowed
I
OUT is the total maximum DC output current
R
CS is a value of the current sense resistor used or the DCR value of the output inductor, LOUT
If the overcurrent condition persists, both phases have PWM cycles terminated by the overcurrent signals. This
puts a converter in a constant current mode with the output current programmed by the ILIM voltage. Eventually
the supply-and-demand equilibrium on the converter output is not satisfied and the output voltage starts to
decline. When the undervoltage threshold is reached, the converter enters a hiccup mode. The controller is
stopped and the output is not regulated any more, the soft-start pin function changes.
It now serves as a hiccup timing capacitor controlled by U20, the fault control circuit. The soft-start pin is
periodically charged and discharged by U20. After seven hiccup cycles, the controller attempts another soft-start
cycle to restore normal operation. If the overload condition persists, the controller returns to the hiccup mode.
This condition may continue indefinitely. In such conditions the average current delivered to the load is
approximately 1/8 of the set overcurrent value.
Multiphase controllers with forced current sharing are inherently sensitive to a failure of the current sense
component or a defect in the assembly process. In case of such failure the entire load current can be steered
with catastrophic consequences into a single channel where the fault has occurred. A dedicated circuit in the
TPS40130 controller detects this defect and prevents the controller from starting up. This fault detection circuit is
active only during chip initialization and does not protect should current sense failure happen during normal
operation.
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