参数资料
型号: TPS40195PWG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 580 kHz SWITCHING FREQ-MAX, PDSO16
封装: GREEN, PLASTIC, TSSOP-16
文件页数: 16/43页
文件大小: 1086K
代理商: TPS40195PWG4
(
)
(
)
( )
(
)
2
OUT
STEP
OUT
UNDER
MAX
IN(min)
OUT
L
I
2.5 H
8
C
71.68 F
2 200mV 90%
10.8 V 1.8 V
2 V
D
V
m
=
m
-
-
(13)
(
)
2
OUT
STEP
OUT
OVER
OUT
L
I
2.5 H 8
C
222.2 F
2 V
V
2 200mV 1.8 V
m
=
m
(14)
RIPPLE
V
100mV
ESR
47m
I
2.1A
=
W
(15)
(
)
2
RIPPLE
OUT
CAP(RMS)
OUT
IN
I
V
I
1
V
12
V
é
ù
ê
ú
=
-
+
+
-
÷
÷
÷
ê
ú
è
è
è
(16)
(
)
(
)
2
RIPPLE
OUT
QSW(rms)
OUT(max)
IN(min)
I
V
I
V
12
÷
=
+
÷
è
(17)
www.ti.com ........................................................................................................................................ SLUS720D – FEBRUARY 2007 – REVISED NOVEMBER 2008
Output Capacitor, COUT
The capacitance value is selected to be greater than the largest value calculated from Equation 13 and
From Equation 13, Equation 14 and Equation 15, the capacitance for COUT should be greater than 223 F and its
ESR should be less than 47 m
. Three 100-
F, 6.3-V, X5R ceramic capacitors are chosen. Each capacitor has
an ESR of 5 m
.
Input Capacitor, CIN
The input capacitor is selected to handle the ripple current of the buck stage. A relatively large capacitance is
used to keep the ripple voltage on the supply line low. This is especially important were the supply line has a
high impedance. It is recommended that the supply line impedance be kept low. The input capacitor RMS current
can be calculated using Equation 16.
The RMS current in the input capacitor is 3.56 A. Two 22-
F, size 1206 capacitors using X7R material has a
typical dissipation factor of 5%. For a 22-
F capacitor at 300 kHz the ESR is approximately 5 m. Two of these
capacitors are used in parallel. The power dissipation in each capacitor is less than 16 mW. A 470-
F, 25-V
electrolytic is added to maintain the voltage on the input rail.
Switching MOSFET, QSW
The following key parameters must be met by the selected MOSFET.
Drain-to-source voltage, V
DS, must be able to withstand the input voltage plus spikes that may be on the
switching node. For this design a VDS rating of between 25 V and 30 V is recommended.
For this design IDD should be greater than 4.1 A
Gate source voltage, V
gs, must be able to withstand the gate voltage from the control device. For the
TPS40195 this is 5 V.
Target efficiency for this design is 90%. Based on 1.8-V output and 10-A operating current this equates to a
power loss in the module of 1.8 W. The design allocates this power budget equally between the two power FETS
and the inductor The equations below are used to calculate the power loss, PQSW, in the switching MOSFET.
Copyright 2007–2008, Texas Instruments Incorporated
23
Product Folder Link(s): TPS40195
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