ILIMH(min)
OUT(max)
DS(on)max
V
I
R
=
(
)
REF
TR
REF
VID TR
I
T
C
V
-
=
TI Information — Selective Disclosure
www.ti.com
SLUS886 – NOVEMBER 2008
Note that due to blanking time considerations, overcurrent threshold accuracy may fall off for duty cycle greater
than 75% because the overcurrent comparator has only a very short time to sample the SW pin voltage under
these conditions and may not have time to respond to voltages very near the threshold.
The short-circuit protection threshold for the high-side MOSFET is fixed at 550 mV typical, 400 mV minimum.
This threshold is in place to provide a maximum current output using pulse-by-pulse current limit in the case of a
fault. The pulse terminates when the voltage drop across the high-side FET exceeds the short-circuit threshold.
The maximum amount of current that can be guaranteed to be sourced from a converter can be found by
where
IOUT(max) is the maximum current that the converter is guaranteed to source
VILIMH(min) is the short-circuit threshold for the high-side MOSFET (400 mV)
RDS(on)max is the maximum resistance of the high-side MOSFET
(4)
If the required current from the converter is greater than the calculated IOUT(max), a lower resistance high-side
MOSFET must be chosen. Both the high-side and low-side thresholds use temperature compensation to
approximate the change in resistance for a typical power MOSFET. This helps counteract shifts in overcurrent
thresholds as temperature increases. For this to be effective, the MOSFETs and the device must be well coupled
thermally.
Voltage Reference and Dynamic VID
To provide optimized voltage for Smart-Reflex DSP cores, the TPS40197 is designed to monitor the VID code
at all times once soft-start is complete, and actively adjusts its output voltage if the VID code should change
during normal operation. A digital-to-analog converter (DAC) generates a reference voltage based on the state of
logical signals at pins VID0 through VID3. The DAC decodes the 4-bit logic signal into one of the discrete
voltages shown in
Table 2. The default setting for the output is 1.2 V (VID code 1111). The output voltage is
1.2 V during initial start or restart after cycling the input, toggling EN pin or recovering from a short circuit at the
output.
To ensure that no erroneous output voltage is produced, the TPS40197 VID inputs have internal anti-skew circuit
with approximately 550 ns of filtering time. Each VID input is pulled up to an internal 1.68-V source with 80-mA
pull-up current for use with open-drain outputs.
The output voltage can be programmed from 0.9 V to 1.2 V in 20 mV steps. Smooth upward and downward core
voltage transition can be achieved by programming the transition rate with an external capacitor connected from
REF pin to GND. The required capacitance can be calculated using
Equation 5.where
VVID-TR is the total voltage transition through VID
IREF is the internal reference source/sink current
TTR is the intended total VID voltage transition time
(5)
CREF must be limited to a maximum of 1.5 mF to avoid interfering with the soft-start. A capacitor (CREF) with a
minimum capacitance of 100-nF is also recommended.
Copyright 2008, Texas Instruments Incorporated
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