参数资料
型号: TPS51916EVM-746
厂商: Texas Instruments
文件页数: 20/34页
文件大小: 0K
描述: EVAL MODULE FOR TPS51916-746
标准包装: 1
系列: D-Cap™, D-Cap2™
主要目的: 特殊用途 DC/DC,DDR 存储器电源
输出及类型: 1,非隔离
输出电压: 1.2 V ~ 1.5 V
电流 - 输出: 20A
输入电压: 8 ~ 20 V
稳压器拓扑结构: 降压
频率 - 开关: 500kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: TPS51916
其它名称: 296-30054
TPS51916EVM-746-ND
TPS51916
SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012
VTT and VTTREF
TPS51916 integrates two high performance, low-drop-out linear regulators, VTT and VTTREF, to provide
complete DDR2/DDR3/DDR3L power solutions. The VTTREF has a 10-mA sink/source current capability, and
tracks ? of VDDQSNS with ±1% accuracy using an on-chip ? divider. A 0.22- μ F (or larger) ceramic capacitor
must be connected close to the VTTREF terminal to ensure stable operation. The VTT responds quickly to track
VTTREF within ±40 mV at all conditions, and the current capability is 2 A for both sink and source. A 10- μ F (or
larger) ceramic capacitor(s) need to be connected close to the VTT terminal for stable operation. To achieve tight
regulation with minimum effect of wiring resistance, a remote sensing terminal, VTTSNS, should be connected to
the positive node of VTT output capacitor(s) as a separate trace from the high-current line to the VTT pin.
(Please refer to the Layout Considerations section for details.)
When VTT is not required in the design, following treatment is strongly recommended.
?
?
?
?
?
?
Connect VLDOIN to VDDQ.
Tie VTTSNS to VTT, and remove capacitors from VTT to float.
Connect VTTGND to GND.
Select MODE2, 3, 4 or 5 shown in Table 2 (Select Non-tracking discharge mode).
Maintain a 0.22-μF capacitor connected at VTTREF.
Pull down S3 to GND with 1-k Ω resistance.
VIN
5VIN
12 V5IN
PGND
17 S3
TPS51916
VBST 15
DRVH 14
VDDQ
1 k W
S5
16 S5
SW 13
DRVL 11
PGND PGND
6
VREF
PGND 10
PGOOD 20
Powergood
8
7
REFIN
GND
VDDQSNS
VLDOIN
VTT
9
2
3
19 MODE
18 TRIP
VTTSNS
VTTGND
1
4
VTTREF
5
0.22 m F
AGND PGND
AGND
PGND
UDG-12075
Figure 38. Application Circuit When VTT Is Not Required
VDDQ Overvoltage and Undervoltage Protection
The TPS51916 sets the overvoltage protection (OVP) when VDDQSNS voltage reaches a level 20% (typ) higher
than the REFIN voltage. When an OV event is detected, the controller changes the output target voltage to 0 V.
This usually turns off DRVH and forces DRVL to be on. When the inductor current begins to flow through the
low-side MOSFET and reaches the negative OCL, DRVL is turned off and DRVH is turned on, for a minimum on-
time.
After the minimum on-time expires, DRVH is turned off and DRVL is turned on again. This action minimizes the
output node undershoot due to LC resonance. When the VDDQSNS reaches 0 V, the driver output is latched as
DRVH off, DRVL on. VTTREF and VTT are turned off and discharged using the non-tracking discharge
MOSFETs regardless of the tracking mode.
20
Copyright ? 2010–2012, Texas Instruments Incorporated
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