参数资料
型号: TPS54478RTET
厂商: Texas Instruments
文件页数: 11/38页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 4A 16WQFN
标准包装: 1
系列: SWIFT™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 4.5 V
输入电压: 2.95 V ~ 6 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 4A
同步整流器:
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 标准包装
供应商设备封装: 16-WQFN 裸露焊盘(3x3)
其它名称: 296-29064-6

SLVSAS2 – JUNE 2011
To reduce the power dissipation of TPS54478 during overcurrent event, the hiccup protection is implemented
beyond the cycle-by-cycle protection. Thermal shutdown prevents the overheat damage of the device.
DETAILED DESCRIPTION
FIXED FREQUENCY PWM CONTROL
The TPS54478 uses an adjustable fixed frequency, peak current mode control. The output voltage is compared
through external resistors on the VSENSE pin to an internal voltage reference by an error amplifier which drives
the COMP pin. An internal oscillator initiates the turn on of the high side power switch. The error amplifier output
is compared to the high side power switch current. When the power switch current reaches the COMP voltage
level the high side power switch is turned off and the low side power switch is turned on. The COMP pin voltage
increases and decreases as the output current increases and decreases. The device implements a current limit
by clamping the COMP pin voltage to a maximum level and also implements a minimum clamp for improved
transient response performance.
SLOPE COMPENSATION AND OUTPUT CURRENT
The TPS54478 adds a compensating ramp to the switch current signal. This slope compensation prevents
sub-harmonic oscillations as duty cycle increases. The available peak inductor current remains constant over the
full duty cycle range.
BOOTSTRAP VOLTAGE (BOOT) AND LOW DROPOUT OPERATION
The TPS54478 has an integrated boot regulator and requires a small ceramic capacitor between the BOOT and
PH pin to provide the gate drive voltage for the high side MOSFET. The value of the ceramic capacitor should be
0.1 μ F. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10 V or higher is
recommended because of the stable characteristics over temperature and voltage.
To improve drop out, the TPS54478 is designed to operate at 100% duty cycle as long as the BOOT to PH pin
voltage is greater than 2.2 V. The high side MOSFET is turned off using an UVLO circuit, allowing for the low
side MOSFET to conduct when the voltage from BOOT to PH drops below 2.2 V. Since the supply current
sourced from the BOOT pin is very low, the high side MOSFET can remain on for more switching cycles than are
required to refresh the capacitor, thus the effective duty cycle of the switching regulator is very high.
ERROR AMPLIFIER
The TPS54478 has a transconductance amplifier. The error amplifier compares the VSENSE voltage to the lower
of the SS/TR pin voltage or the internal 0.600 V voltage reference. The transconductance of the error amplifier is
225 μ A/V during normal operation. When the voltage of VSENSE pin is below 0.600 V and the device is
regulating using the SS/TR voltage, the gm is typically greater than 77 μ A/V, but less than 225 μ A/V. The
frequency compensation components are placed between the COMP pin and ground.
VOLTAGE REFERENCE
The voltage reference system produces a precise ± 1% voltage reference over temperature by scaling the output
of a temperature-stable bandgap circuit. The bandgap and scaling circuits produce 0.600 V at the non-inverting
input of the error amplifier.
ADJUSTING THE OUTPUT VOLTAGE
The output voltage is set with a resistor divider from the output node to the VSENSE pin. It is recommended to
use divider resistors with 1% tolerance or better. Start with a 20 k ? for the R1 resistor and use the Equation 1 to
calculate R2. To improve efficiency at very light loads consider using larger value resistors. If the values are too
high the regulator is more susceptible to noise and voltage errors from the VSENSE input current are noticeable.
vertical spacer
vertical spacer
? 0.6 V ?
R2 = R1 ′ ? ÷
è V O - 0.6 V ?
Copyright ? 2011, Texas Instruments Incorporated
(1)
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