参数资料
型号: TPS54478RTET
厂商: Texas Instruments
文件页数: 13/38页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 4A 16WQFN
标准包装: 1
系列: SWIFT™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 4.5 V
输入电压: 2.95 V ~ 6 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 4A
同步整流器:
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
包装: 标准包装
供应商设备封装: 16-WQFN 裸露焊盘(3x3)
其它名称: 296-29064-6
SLVSAS2 – JUNE 2011
SLOW START / TRACKING PIN
The TPS54478 regulates to the lower of the SS/TR pin and the internal reference voltage. A capacitor on the
SS/TR pin to ground implements a slow start time. Before the SS pin reaches the voltage threshold V SSTHR , the
charge current is about 45 μ A. The TPS54478 internal pull-up current source of 2.2 μ A charges the external slow
start capacitor after the SS pin voltage exceeds V SSTHR . Equation 4 calculates the required slow start capacitor
value where Tss is the desired slow start time in ms and Css is the required capacitance in nF.
vertical spacer
Css(nF) = 3 ′ Tss(mS)
(4)
If during normal operation, the VIN goes below the UVLO, EN pin pulled below 1.21 V, or a thermal shutdown
event occurs, the TPS54478 stops switching. When the VIN goes above UVLO, EN is released or pulled high, or
a thermal shutdown is exited, then SS/TR is discharged to below 65 mV before reinitiating a powering up
sequence. The VSENSE voltage will follow the SS/TR pin voltage with a 65mV offset up to 90% of the internal
voltage reference. When the SS/TR voltage is greater than 90% of the internal reference voltage the offset
increases as the effective system reference transitions from the SS/TR voltage to the internal voltage reference.
SEQUENCING
Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD
pins. The sequential method can be implemented using an open drain or collector output of a power on reset pin
of another device. Figure 23 shows the sequential method. The PWRGD is coupled to the EN pin on the
TPS54478 which enables the second power supply once the primary supply reaches regulation.
Ratio-metric start up can be accomplished by connecting the SS/TR pins together. The regulator outputs ramp
up and reach regulation at the same time. When calculating the slow start time the pull up current source must
be doubled in Equation 4 . The ratio metric method is illustrated in Figure 25 .
TPS54478
EN1
EN1
SS1
PWRGD1
EN2
SS2
EN1
VO1
V o1
t - t = 1ms/div
PWRGD2
PWRGD1
VO2
V o2
Time = 1 ms/div
Figure 23. Sequential Start-Up Sequence
Copyright ? 2011, Texas Instruments Incorporated
Figure 24. Sequential Startup using EN and
PWRGD
13
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