<
Voripple
Resr
Iripple
(
)
12
f
×
-
=
×
Vout Vinmax Vout
Icorms
Vinmax L1
sw
(
)
-
=
×
Vinmin Vout
Vout
Icirms
Iout
Vinmin
0.25
f
×
D
=
×
Ioutmax
Vin
Cin
sw
(
)
(
)
( )
Tss ms Iss
A
C7(nF)
Vref V
×
=
m
SLVS949C
– MAY 2009 – REVISED MAY 2011
Equation 24 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple
specification.
Equation 24 indicates the ESR should be less than 19.7 m
Ω. In this case, the ceramic caps’ ESR is
much smaller than 19.7 m
Ω.
(24)
Additional capacitance de-ratings for aging, temperature and DC bias should be factored in which increases this
minimum value. For this example, a 47
μF 6.3V X5R ceramic capacitor with 3 mΩ of ESR is be used. Capacitors
generally have limits to the amount of ripple current they can handle without failing or producing excess heat. An
output capacitor that can support the inductor ripple current must be specified. Some capacitor data sheets
specify the RMS (Root Mean Square) value of the maximum ripple current.
Equation 25 can be used to calculate
the RMS ripple current the output capacitor needs to support. For this application,
Equation 25 yields 485mA.
(25)
Input Capacitor Selection
The TPS54620 requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of at least 4.7
F of
effective capacitance on the PVIN input voltage pins and 4.7
F on the Vin input voltage pin. In some
applications additional bulk capacitance may also be required for the PVIN input. The effective capacitance
includes any DC bias effects. The voltage rating of the input capacitor must be greater than the maximum input
voltage. The capacitor must also have a ripple current rating greater than the maximum input current ripple of the
TPS54620. The input ripple current can be calculated using
Equation 26.(26)
The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the
capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that
is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors
because they have a high capacitance to volume ratio and are fairly stable over temperature. The output
capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor
decreases as the DC bias across a capacitor increases. For this example design, a ceramic capacitor with at
least a 25 V voltage rating is required to support the maximum input voltage. For this example, one 10
μF and
one 4.7
F 25 V capacitors in parallel have been selected as the VIN and PVIN inputs are tied together so the
TPS54620 may operate from a single supply. The input capacitance value determines the input ripple voltage of
the regulator. The input voltage ripple can be calculated using
Equation 27. Using the design example values,
Ioutmax = 6 A, Cin = 14.7
μF, Fsw=480 kHz, yields an input voltage ripple of 213 mV and a RMS input ripple
current of 2.95 A.
(27)
Slow Start Capacitor Selection
The slow start capacitor determines the minimum amount of time it takes for the output voltage to reach its
nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This
is also used if the output capacitance is very large and would require large amounts of current to quickly charge
the capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the
TPS54620 reach the current limit or excessive current draw from the input power supply may cause the input
voltage rail to sag. Limiting the output voltage slew rate solves both of these problems. The soft start capacitor
value can be calculated using
Equation 28. For the example circuit, the soft start time is not too critical since the
output capacitor value is 47
μF which does not require much current to charge to 3.3 V. The example circuit has
the soft start time set to an arbitrary value of 3.5 ms which requires a 10 nF capacitor. In TPS54620, Iss is 2.3
uA and Vref is 0.8V.
(28)
Copyright
2009–2011, Texas Instruments Incorporated
23