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参数资料
| 型号： | TPS63031DSKT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 1.1 A SWITCHING REGULATOR, 2600 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封装： | 2.50 X 2.50 MM, PLASTIC, SON-10 |
| 文件页数： | 4/24页 |
| 文件大小： | 1326K |
| 代理商： | TPS63031DSKT |
DETAILED DESCRIPTION
CONTROLLER CIRCUIT
Synchronous Operation
Buck-Boost Operation
Power Save Mode and Synchronization
SLVS696A – OCTOBER 2008 – REVISED MARCH 2009.................................................................................................................................................. www.ti.com
The controlling circuit of the device is based on an average current mode topology. The average inductor current
is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses
input and output voltage feedforward. Changes of input and output voltage are monitored and immediately can
change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier
gets its feedback input from the FB pin. At adjustable output voltages a resistive voltage divider must be
connected to that pin. At fixed output voltages FB must be connected to the output voltage to directly sense the
voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage will be
compared with the internal reference voltage to generate a stable and accurate output voltage.
The controller circuit also senses the average input current as well as the peak input current. With this, maximum
input power can be controlled as well as the maximum peak current to achieve a safe and stable operation under
all possible conditions. To finally protect the device from overheating, an internal temperature sensor is
implemented.
The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range.
To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and
PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point ideally close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter.
To be able to regulate the output voltage properly at all possible input voltage conditions, the device
automatically switches from step down operation to boost operation and back as required by the configuration. It
always uses one active switch, one rectifying switch, one switch permanently on, and one switch permanently off.
Therefore, it operates as a step down converter (buck) when the input voltage is higher than the output voltage,
and as a boost converter when the input voltage is lower than the output voltage. There is no mode of operation
in which all 4 switches are permanently switching. Controlling the switches this way allows the converter to
maintain high efficiency at the most important point of operation; when input voltage is close to the output
voltage. The RMS current through the switches and the inductor is kept at a minimum, to minimize switching and
conduction losses. Switching losses are also kept low by using only one active and one passive switch.
Regarding the remaining 2 switches, one is kept permanently on and the other is kept permanently off, thus
causing no switching losses.
The PS/SYNC pin can be used to select different operation modes. To enable power save, PS/SYNC must be
set low. Power save mode is used to improve efficiency at light load. If power save mode is enabled, the
converter stops operating if the average inductor current gets lower than about 100 mA and the output voltage is
at or above its nominal value. If the output voltage decreases below its nominal value, the device ramps up the
output voltage again by starting operation using a programmed average inductor current higher than required by
the current load condition. Operation can last for one or several pulses. The converter again stops operating
once the conditions for stopping operation are met again.
The power save mode can be disabled by programming high at the PS/SYNC. Connecting a clock signal at
PS/SYNC forces the device to synchronize to the connected clock frequency. Synchronization is done by a PLL,
so synchronizing to lower and higher frequencies compared to the internal clock works without any issues. The
PLL can also tolerate missing clock pulses without the converter malfunctioning. The PS/SYNC input supports
standard logic thresholds.
12
Copyright 2008–2009, Texas Instruments Incorporated
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