
-
S
IN
OUT
C
C_ESR
swpeak
C_ESR
S
V
I
V =
V
I
R
V
f
C
D
D
=
SLVS904A – MAY 2009 – REVISED JANUARY 2011
www.ti.com
Input Capacitor Selection
For good input voltage filtering low ESR ceramic capacitors are recommended. TPS65148 has an analog input
VIN. A 1-mF bypass is required as close as possible from VIN to GND.
Two 10-mF (or one 22-F) ceramic input capacitor is sufficient for most of the applications. For better input
voltage filtering this value can be increased. Refer to
Table 3 and typical applications for input capacitor
recommendations.
Output Capacitor Selection
For best output voltage filtering a low ESR output capacitor is recommended. Four 10-F (or two 22-F) ceramic
output capacitors work for most of the applications. Higher capacitor values can be used to improve the load
transient response. Refer to
Table 3 for the selection of the output capacitor.
Table 3. Rectifier Input and Output Capacitor Selection
CAPACITOR
VOLTAGE
COMPONENT SUPPLIER
COMPONENT CODE
COMMENTS
RATING
10 mF/0805
10 V
Taiyo Yuden
LMK212BJ106KD
CIN
1 mF/0603
10 V
Taiyo Yuden
EMK107BJ105KA
VIN bypass
10 mF/1206
25 V
Taiyo Yuden
TMK316BJ106ML
COUT
To calculate the output voltage ripple, the following equations can be used:
(7)
ΔVC_ESR can be neglected in many cases since ceramic capacitors provide very low ESR.
Undervoltage Lockout (UVLO)
To avoid misoperation of the device at low input voltages an undervoltage lockout is included that disables the
device, if the input voltage falls below 2.0 V.
Gate Drive Pin (GD)
The Gate Drive (GD) allows controlling an external isolation P-channel MOSFET switch. Using a 1-nF capacitor
is recommend between the source and the gate of the FET to properly turn it on. GD pin is pulled low when the
input voltage is above the undervoltage lockout threshold (UVLO) and when enable (EN) is 'high'. The gate drive
has an internal pull up resistor to VIN of typically 5 k. The external P-channel MOSFET must be chosen with
VT < VIN_min in order to be properly turned on.
Overvoltage Protection (OVP)
The main boost converter has an integrated overvoltage protection to prevent the Power Switch from exceeding
the absolute maximum switch voltage rating at pin SW in case the feedback (FB) pin is floating or shorted to
GND. In such an event, the output voltage rises and is monitored with the OVP comparator over the SUP pin. As
soon as the comparator trips at typically 19 V, the boost converter turns the N-Channel MOSFET off. The output
voltage falls below the overvoltage threshold and the converter starts switching again. If the voltage on the FB
pin is below 90% of its typical value (1.240 V) for more than 55 ms, the device is latched down. The input voltage
VIN needs to be cycled to restart the device. In order to detect the overvoltage, the SUP pin needs to be
connected to output voltage of the boost converter VS. XAO output is independent from OVP.
Short Circuit Protection (SCP)
At start-up, as soon as the UVLO is reached and the EN signal is high, the GD pin is pulled 'low'. The feedback
voltage of the boost converter VFB as well as the SUP pin voltage (VS) are sensed. After 2ms, if the voltage on
SUP pin has not risen or the FB voltage is below 90% of its typical value (1.240 V), then the GD pin is pulled
high for 55ms. After 3 tries, if the device is still in short circuit, it is latched down. The input voltage VIN needs to
be cycled to restart the device. The SCP is also valid during normal operation.
14
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