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| 型号： | TPS73601MDBVREP |
| 厂商： | Texas Instruments |
| 文件页数： | 12/27页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ .4A SOT23-5 |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 1.2 V ~ 5.5 V |
| 输入电压： | 1.7 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.075V @ 400mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 400mA（最小值） |
| 电流 - 限制（最小）： | 400mA |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 标准包装 |
| 其它名称： | 296-20789-6 |
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TPS73601-EP, TPS73615-EP, TPS73618-EP
TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP
SGLS326C – APRIL 2006 – REVISED FEBRUARY 2009 .................................................................................................................................................. www.ti.com
APPLICATION INFORMATION
The TPS736xx belongs to a family of new-generation
LDO regulators that use an NMOS pass transistor to
achieve ultra-low-dropout performance, reverse
current blockage, and freedom from output capacitor
constraints. These features, combined with low noise
and an enable input, make the TPS736xx ideal for
portable applications. This regulator family offers a
wide selection of fixed-output voltage versions and an
adjustable-output version. All versions have thermal
and overcurrent protection, including foldback current
limit.
connections for the adjustable-output version
(TPS73601). R 1 and R 2 can be calculated for any
output voltage using the formula in Figure 33 . Sample
resistor values for common output voltages are
shown in Figure 3 . For the best accuracy, make the
parallel combination of R 1 and R 2 approximately 19
k ? .
supply near the regulator. This counteracts reactive
input sources and improves transient response, noise
rejection, and ripple rejection. A higher-value
capacitor may be necessary if large, fast rise-time
load transients are anticipated, or the device is
located several inches from the power source.
The TPS736xx does not require an output capacitor
for stability and has maximum phase margin with no
capacitor. It is designed to be stable for all available
types and values of capacitors. In applications where
V IN ? V OUT < 0.5 V and multiple low ESR capacitors
are in parallel, ringing may occur when the product of
C OUT and total ESR drops below 50 ? . Total ESR
includes all parasitic resistance, including capacitor
ESR and board, socket, and solder-joint resistance.
In most applications, the sum of capacitor ESR and
trace resistance meets this requirement.
Output Noise
A precision band-gap reference is used to generate
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
the internal reference voltage, V REF . This reference is
the dominant noise source within the TPS736xx and
it generates approximately 32 μ V RMS (10 Hz to
V IN
IN
OUT
V OUT
100 kHz) at the reference output (NR). The regulator
control loop gains up the reference noise with the
TPS736xx
same gain as the reference voltage, so that the noise
EN
GND
NR
voltage of the regulator is approximately given by:
Optional bypass
capacitor to reduce
output noise
V N + 32 m V RMS
(R 1 ) R 2 )
R 2
+ 32 m V RMS
V OUT
V REF
(1)
V N ( m V RMS ) + 27 V OUT (V)
V
Figure 32. Typical Application Circuit for
Fixed-Voltage Versions
Optional input capacitor. Optional output capacitor.
Since the value of V REF is 1.2 V, this relationship
reduces to:
m V RMS
(2)
May improve source
impedance, noise, or PSRR.
May improve load transient,
noise, or PSRR.
for the case of no C NR .
V IN
IN
EN
OUT
TPS736xx
GND
FB
R 1
C FB
V OUT
An internal 27-k ? resistor in series with the noise
reduction pin (NR) forms a low-pass filter for the
voltage reference when an external noise reduction
capacitor, C NR , is connected from NR to ground. For
(R 1 + R 2 )
R 1
V N ( m V RMS ) + 8.5 V OUT (V)
V
R 2
Optional capacitor
V OUT = × 1.204 reduces output noise
and improves
transient response.
Figure 33. Typical Application Circuit for
Adjustable-Voltage Versions
Input and Output Capacitor Requirements
Although an input capacitor is not required for
stability, it is good analog design practice to connect
a 0.1- μ F to 1- μ F low ESR capacitor across the input
C NR = 10 nF, the total noise in the 10-Hz to 100-kHz
bandwidth is reduced by a factor of ~3.2, giving the
approximate relationship:
m V RMS
(3)
for C NR = 10 nF.
This noise reduction effect is shown as RMS Noise
12
Copyright ? 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP
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| TPS73601MDCQREP | 功能描述:低压差稳压器 - LDO Mil Enh Cap-Free NMOS 400-mA LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS73601MDCQREPG4 | 功能描述:低压差稳压器 - LDO EP Cap-Free Nmos 400-Ma LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS73601MDRBREP | 功能描述:低压差稳压器 - LDO EP Cap-Free,Nmos 400Ma LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS73601QDBVRQ1 | 功能描述:低压差稳压器 - LDO AC Single Out LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS736125DRBR | 功能描述:低压差稳压器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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