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| 型号： | TPS73601MDBVREP |
| 厂商： | Texas Instruments |
| 文件页数： | 13/27页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ .4A SOT23-5 |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 1.2 V ~ 5.5 V |
| 输入电压： | 1.7 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.075V @ 400mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 400mA（最小值） |
| 电流 - 限制（最小）： | 400mA |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 标准包装 |
| 其它名称： | 296-20789-6 |
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TPS73601-EP, TPS73615-EP, TPS73618-EP
TPS73625-EP, TPS73630-EP, TPS73632-EP, TPS73633-EP
www.ti.com .................................................................................................................................................. SGLS326C – APRIL 2006 – REVISED FEBRUARY 2009
The TPS73601 adjustable version does not have the
noise-reduction pin available. However, connecting a
avoid degraded transient response. The boundary of
this transient dropout region is approximately twice
feedback capacitor, C FB , from the output to the FB pin
the
dc
dropout.
Values
of
reduces output noise and improves load transient
performance.
The TPS736xx uses an internal charge pump to
develop an internal supply voltage sufficient to drive
the gate of the NMOS pass element above V OUT . The
charge pump generates ~250 μ V of switching noise
at ~4 MHz; however, charge-pump noise contribution
V IN – V OUT above this line ensure normal transient
response.
Operating in the transient dropout region can cause
an increase in recovery time. The time required to
recover from a load transient is a function of the
magnitude of the change in load current rate, the rate
of change in load current, and the available
is negligible at the output of the regulator for most
headroom
(V IN
to
V OUT
voltage
drop).
Under
values of I OUT and C OUT .
Board Layout Recommendation to Improve
PSRR and Noise Performance
To improve ac performance such as PSRR, output
noise, and transient response, it is recommended that
the board be designed with separate ground planes
for V IN and V OUT , with each ground plane connected
worst-case conditions [full-scale instantaneous load
change with (V IN – V OUT ) close to dc dropout levels],
the TPS736xx can take a couple of hundred
microseconds to return to the specified regulation
accuracy.
Transient Response
The low open-loop output impedance provided by the
only at the GND pin of the device. In addition, the
NMOS
pass
element
in
a
voltage-follower
ground connection for the bypass capacitor should
configuration allows operation without an output
connect directly to the GND pin of the device.
capacitor
for
many
applications.
As
with
any
V OUT
Internal Current Limit
The TPS736xx internal current limit helps protect the
regulator during fault conditions. Foldback helps to
protect the regulator from damage during output
short-circuit conditions by reducing current limit when
V OUT drops below 0.5 V. See Figure 12 for a graph of
I OUT vs V OUT .
Shutdown
The enable (EN) pin is active high and is compatible
with standard TTL-CMOS levels. V EN below 0.5 V
(max) turns the regulator off and drops the ground-pin
current to approximately 10 nA. When shutdown
capability is not required, EN can be connected to
V IN . When a pullup resistor is used, and operation
down to 1.8 V is required, use pullup resistor values
below 50 k ? .
Dropout Voltage
regulator, the addition of a capacitor (nominal value
1 μ F) from the output pin to ground reduces
undershoot magnitude but increases duration. In the
adjustable version, the addition of a capacitor, C FB ,
from the output to the adjust pin also improves the
transient response.
The TPS736xx does not have active pulldown when
the output is overvoltage. This allows applications
that connect higher voltage sources, such as
alternate power supplies, to the output. This also
results in an output overshoot of several percent if
load current quickly drops to zero when a capacitor is
connected to the output. The duration of overshoot
can be reduced by adding a load resistor. The
overshoot decays at a rate determined by output
capacitor C OUT and the internal/external load
resistance. The rate of decay is given by:
Fixed-voltage version:
dV dt +
C OUT 80 k W ? R LOAD (4)
V OUT
The TPS736xx uses an NMOS pass transistor to
achieve extremely low dropout. When (V IN – V OUT ) is
less than the dropout voltage (V DO ), the NMOS pass
device is in its linear region of operation and the
input-to-output resistance is the R DS-ON of the NMOS
pass element.
For large step changes in load current, the TPS736xx
requires a larger voltage drop from V IN to V OUT to
Copyright ? 2006–2009, Texas Instruments Incorporated
Adjustable-voltage version:
dV dt +
C OUT 80 k W ? (R 1 ) R 2 ) ? R LOAD
(5)
13
Product Folder Link(s): TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP
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| TPS73601MDCQREP | 功能描述:低压差稳压器 - LDO Mil Enh Cap-Free NMOS 400-mA LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS73601MDCQREPG4 | 功能描述:低压差稳压器 - LDO EP Cap-Free Nmos 400-Ma LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS73601MDRBREP | 功能描述:低压差稳压器 - LDO EP Cap-Free,Nmos 400Ma LDO Reg RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS73601QDBVRQ1 | 功能描述:低压差稳压器 - LDO AC Single Out LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| TPS736125DRBR | 功能描述:低压差稳压器 - LDO Cap-Free NMOS 400mA RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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