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| 型号： | TPS780330220DRVTG4 |
| 厂商： | Texas Instruments |
| 文件页数： | 18/33页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V/2.2V .15A 6-SON |
| 标准包装： | 250 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3.3V，2.2V |
| 输入电压： | 2.2 V ~ 5.5 V |
| 稳压器数量： | 1 |
| 电流 - 输出： | 150mA（最小值） |
| 电流 - 限制（最小）： | 150mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 供应商设备封装： | 6-SON 裸露焊盘（2x2） |
| 包装： | 带卷 (TR) |
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TPS780 Series
TI Information — Selective Disclosure
SBVS083D – JANUARY 2007 – REVISED SEPTEMBER 2012
Powering the MSP430 Microcontroller
3.0V
Several versions of the TPS780 are ideal for
powering the MSP430 microcontroller . Table 4 shows
potential applications of some voltage versions.
1 m F
V IN
LDO
V OUT
1 m F
V CC
I/O
MSP430
Table 4. Typical MSP430 Applications
V OUT(HIGH)
V OUT(LOW)
GND
V SS
DEVICE
(TYP)
(TYP)
APPLICATION
V OUT, MIN > 1.800V
required by many
V CC = 3.0V
TPS780360200
3.6V
2.0V
MSP430s. Allows
lowest power
5mA
consumption
operation.
V OUT, MIN > 2.200V
Active
Mode
TPS780360220
3.6V
2.2V
required by some
MSP430s FLASH
operation.
1.6 m A I Q
LPM3/Sleep Mode
V OUT, MIN > 2.700V
TPS780360300
3.6V
3.0V
required by some
MSP430s FLASH
operation.
Figure 56. Typical LDO without DVS
V OUT, MIN < 3.600V
required by some
TPS780360220
3.6V
2.2V
MSP430s. Allows
highest speed
operation.
V IN
V OUT
2.2V to 3.6V
V CC
1 m F
1 m F
The TPS780 family offers many output voltage
versions to allow designers to optimize the supply
voltage for the processing speed required of the
TPS780
V SET
GND
I/O
MSP430
V SS
MSP430. This flexible architecture minimizes the
supply current consumed by the particular MSP430
application. The MSP430 total system power can be
reduced by substituting the 500nA I Q TPS780 series
LDO in place of an existing ultra-low I Q LDO (typical
V CC = 3.6V
best case = 1 μ A). Additionally, DVS allows for
increasing the clock speed in active mode (MSP430
V CC = 3.6V). The 3.6V V CC reduces the MSP430 time
in active mode. In low-power mode, MSP430 system
power can be further reduced by lowering the
V CC = 2.2V
5mA
Active
Mode
700nA I Q
MSP430 V CC to 2.2V in sleep mode.
Key features of the TPS780 series are an ultralow
quiescent current (500nA), DVS, and miniaturized
Current
LPM3/Sleep Mode
packaging. The TPS780 family are available in SON-
6 and TSOT-23 packages. Figure 56 shows a typical
MSP430 circuit powered by an LDO without DVS.
that incorporates an integrated DVS, thus simplifying
the circuit design. In a circuit without DVS, as
MSP430 goes into sleep mode, V CC remains at 3.0V;
if DVS is applied, V CC could be reduced in sleep
mode. In Figure 57 , the TPS780 LDO with integrated
DVS maintains 3.6V V CC until a logic high signal from
the MSP430 forces V OUT to level shift V OUT from 3.6V
down to 2.2V, thus reducing power in sleep mode.
Figure 57. TPS780 with Integrated DVS
The other benefit of DVS is that it allows a higher V CC
voltage on the MSP430, increasing the clock speed
and reducing the active mode dwell time.
18
Copyright ? 2007–2012, Texas Instruments Incorporated
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