参数资料
型号: TRF2050PW
厂商: TEXAS INSTRUMENTS INC
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20
封装: PLASTIC, SO-20
文件页数: 1/34页
文件大小: 543K
代理商: TRF2050PW
TRF2050
LOW-VOLTAGE 1.2-GHz FRACTIONAL-N/INTEGER-N SYNTHESIZER
SLWS030E– JUNE 1996 – REVISED OCTOBER 2000
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POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 1.2-GHz Operation
D Two Operating Modes:
– Philips SA7025 Emulation Mode
Pin-for-Pin and Programming
Compatible
– Extended Performance Mode (EPM)
D Dual RF – IF Phase-Locked Loops
D Fractional-N or Integer-N Operation
D Programmable EPM Fractional
Modulus of 1–16
D Normal, Speed-Up, and Fractional
Compensation Charge Pumps
D Low-Power Consumption
description
The TRF2050 is a low-voltage, low-power consumption 1.2-GHz fractional-N/integer-N frequency synthesizer
component for wireless applications. Fractional-N division and an integral speed-up charge pump are used to
achieve rapid channel switching. Two operating modes are available: 1) SA7025 emulation mode in which the
part emulates the Philips SA7025 fractional-N synthesizer and 2) extended performance mode (EPM), which
provides additional features including fractional accumulator modulos from 1 to 16 (compared to only 5 or 8 for
the SA7025) and programmable control of the speed-up mode duration (compared to the SA7025 method of
holding the strobe line high).
Along with external loop filters, the TRF2050 provides all functions necessary for voltage-controlled oscillator
(VCO) control in a dual phase-locked loop (PLL) frequency synthesizer system. A main channel is provided for
radio frequency (RF) channels and an auxiliary channel for intermediate frequency (IF) channels. The
current-output charge pumps directly drive passive resistance-capacitance (RC) filter networks to generate
VCO control voltages. Rapid main-channel frequency switching is achieved with a charge pump arrangement
that increases the current drive and alters the loop-filter frequency response during the speed-up mode portion
of the switching interval.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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CLOCK
DATA
STROBE
VSS
RFIN
VCCP
REFIN
RA
AUXIN
VDD
TSETUP
LOCK/TEST
RF
RN
VDDA
PHP
PHI
VSSA
PHA
PW PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2000, Texas Instruments Incorporated
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