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参数资料
| 型号： | TRF3750IRGPR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2400 MHz, PQCC20 |
| 封装： | 4 X 4 MM, GREEN, PLASTIC, QFN-20 |
| 文件页数： | 19/37页 |
| 文件大小： | 860K |
| 代理商： | TRF3750IRGPR |
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TRF3750
SLWS146B MARCH 2004 REVISED AUGUST 2007
www.ti.com
26
Building a Complete PLL Using the TRF3750
This application of the TRF3750 is just one of many possible ways in which a wireless infrastructure transmitter
LO can be implemented for GSM applications and beyond.
Supplies/Decoupling
Appropriate decoupling is important in ensuring optimum noise performance of the device. Ideally, the AVDD
and DVDD supplies should be separated through a ferrite and be at the same potential. A larger capacitor, in
the order of a 10 F, should be placed in the supply chain, followed by a couple of small value decoupling
capacitors very close to the device’s supply pins. Typical values are 0.1 F and 10 pF. The decoupling capacitors
should not be shared and should be chosen to have low ESR. The VCP supply needs to be at least 1 V greater
than the AVDD and DVDD supplies and similar decoupling should be applied.
Reference
A large range of frequencies can be used for the reference input. In this example, an external TCXO of 10 MHz
is used to provide the stable reference frequency for the REFIN pin of the device. The quality of the reference
oscillator is important, and its phase noise needs to be significantly lower than what is expected of the entire
loop as it does not get attenuated in the loop. Typically, such devices do not require 50- terminations and can
be taken into the PLL ac coupled. The TRF3750 has a large range of power levels that it can accept at the REFIN
input; however stronger signals result typically in better phase noise performance. Values of +5 dBms (referred
to 50 ) should yield excellent performance. The TRF3750 is compatible with most commercially available
oscillators.
VCO Selection
Plenty of VCOs exist in the market that can cover the frequency range of all wireless applications today. One
clear advantage of the TRF3750 is that it features an extended charge pump supply, allowing interface to VCOs
with larger tuning ranges. VCP can be as high as 8 V, which implies that VCOs with tuning voltage ranges of
7 V can easily be accommodated. In closing the loop with the VCO, it is important to ensure that proper
termination is observed, especially in the higher range of frequency operation. A standard resistive splitter
implementation works well, where each of the three Rs in the classic T connection assume the value of 16.6 .
In other cases where impedance matching is less critical than getting maximum power out of the whole PLL
loop, the user may decide to leave the resistors out and just tap off a trace from the VCO output and feed it back
to the synthesizer. Additionally, a small series resistor can be placed in the feedback path towards the TRF3750
so as to reduce the relative power delivered to the PLL versus that available for the transmitter. The VCO’s
supply should also be decoupled as recommended by the manufacturer.
Loop Filter Design
Numerous methodologies and design techniques exist for designing optimized loop filters for particular
applications. The loop filter design can affect the stability of the loop, the lock time, the bandwidth, the extra
attenuation on the reference spurs, etc. The role of the loop filter is to integrate and lowpass the pulses of the
charge pump and eventually yield an output tuning voltage that drives the VCO. Several filter topologies can
be implemented, including both passive and active. In this section, we use a third-order passive filter. For this
example, we assume several design parameters. First, the VCO’s manufacturer should specify the device’s
KV, which is given in MHz/V. Here we assume a value of 12 MHz/V, meaning that in the linear region, changing
the tuning voltage of the VCO by 1 V induces a change of the output frequency of about 12 MHz. We already
know that N = 4500 and that our fPFD = 200 kHz. We also further assume that current setting 1 will be used
and be set to maximum current of 5 mA. In addition, we need to determine the bandwidth of the loop filter. This
is a critical consideration as it affects (among other things) the lock time of the system. Assuming an
approximate bandwidth of around 20 kHz is needed, and that for stability we desire a phase margin of about
45 degrees, the following values for the components of the loop filter can be derived. These values, along with
the rest of the example circuitry, are shown in Figure 26. It is important to note here that there are almost infinite
solutions to the problem of designing the loop filter and the designer is called to make tradeoff decisions for each
application.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| TRF3750IRGPRG4 | 功能描述:时钟合成器/抖动清除器 High Perf Integer-N PLL Freq Synth RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| TRF3750Q1900EVM | 功能描述:射频开发工具 TRF3750Q1900 Eval Mod RoHS:否 制造商:Taiyo Yuden 产品:Wireless Modules 类型:Wireless Audio 工具用于评估:WYSAAVDX7 频率: 工作电源电压:3.4 V to 5.5 V |
| TRF3750Q2100EVM | 制造商:Texas Instruments 功能描述:TRF3750Q2100 EVAL - Bulk |
| TRF3750Q900EVM | 制造商:Texas Instruments 功能描述:TRF3750Q900 EVAL - Bulk |
| TRF3750T-1900EVM | 功能描述:射频开发工具 TRF3750T-1900 Eval Mod RoHS:否 制造商:Taiyo Yuden 产品:Wireless Modules 类型:Wireless Audio 工具用于评估:WYSAAVDX7 频率: 工作电源电压:3.4 V to 5.5 V |
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