参数资料
型号: TSA5060AT/C1,518
厂商: NXP SEMICONDUCTORS
元件分类: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 1300 MHz, PDSO16
封装: 3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16
文件页数: 5/24页
文件大小: 119K
代理商: TSA5060AT/C1,518
2000 Oct 24
13
Philips Semiconductors
Product specication
1.3 GHz I2C-bus controlled low phase
noise frequency synthesizer
TSA5060A
Notes
1. Asymmetrical drive on pin RFA or RFB; see Fig.3.
2. The drive level is expected with the crystal at series resonance with a series resistance of 50
. The value will be
different with another crystal.
3. To drive pin XTAL from the pin XT/COMP of another TSA5060A, couple the signal through a capacitor of 1 nF
(to remove the DC level) in series with an 1.2 k
resistor; see Fig.5.
4. The voltage corresponding to a LOW-level on the I2C-bus includes the noise margin as defined in the I2C-bus
specification. The worst situation is a bus voltage of 5 V + 10%. In this case the noise margin is 0.55 V below
0.3
× 5.5 V, thus 1.1 V.
5. The voltage corresponding to a HIGH-level on the I2C-bus includes the noise margin as defined in the I2C-bus
specification. The worst situation is a bus voltage of 3.3 V
10%. In this case the noise margin is 0.59 V above
0.7
× 2.97 V, thus 2.67 V.
XT/COMP output (pin XT/COMP)
Vo(p-p)
AC output voltage (peak-to-peak value)
XCE = 1
400
mV
Input/output and output ports (pins P0, P1, P2 and P3)
IlO
port leakage current
port off; VO =VCC
10
A
VO(sat)
output port saturation voltage
port on; Isink =10mA
0.2
0.4
V
VIL
LOW-level input voltage
1.5
V
VIH
HIGH-level input voltage
3.0
V
ADC input (pin ADC)
ILIH
HIGH-level input leakage current
VADC =VCC
10
A
ILIL
LOW-level input leakage current
VADC =0V
10
A
Address selection (pin AS)
ILIH
HIGH-level input leakage current
VAS =VCC
1mA
ILIL
LOW-level input leakage current
VAS =0V
0.5
mA
SCL and SDA inputs (pins SCL and SDA)
VIL
LOW-level input voltage
including noise margin;
note 4
1.1
V
VIH
HIGH-level input voltage
including noise margin;
note 5
2.67
V
ILIH
HIGH-level input leakage current
VIH = 5.5 V
VCC = 5.5 V
10
A
VCC =0V
10
A
ILIL
LOW-level input leakage current
VIL =0V; VCC = 5.5 V
10
A
fSCL
SCL clock frequency
400
kHz
SDA output (pin SDA)
VO(ack)
output voltage during acknowledge
Isink =3mA
0.4
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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相关代理商/技术参数
参数描述
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