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参数资料
| 型号： | TSB14C01MHV |
| 英文描述： | IC APEX 20KE FPGA 160K 484-FBGA |
| 中文描述： | 收发器 |
| 文件页数： | 34/35页 |
| 文件大小： | 224K |
| 代理商： | TSB14C01MHV |
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6
–
14
6.5.2
Bus Reset
Once a PHY control request of Bus_Reset is communicated from the node controller to the PHY the PHY
communicates a Bus_Reset onto the bus.
NOTE:
Since a PHY transmitting a Bus_Reset must also react accordingly once the Bus_Reset
event is detected, its state machines do have the opportunity to advance beyond those of other
nodes. This ensures that all nodes are in a somewhat similar state after such a Bus_Reset
event.
Once a PHY detects that a Bus_Reset event has occurred on the bus, it communicates a bus reset status to the LLC.
The node controller initializes a bus reset by writing to the PHY control register with the IBR bit or IRBR bit set to 1.
The PHY hardware resets the IBR and IRBR bit to zero on detection of its own bus reset.
6.6
Live Insertion
It is up to the user to design the node or module to safely receive power from the particular backplane they are using
during a live insertion. But in principle, live insertion is supported and does not cause a bus reset event to occur.
相关PDF资料 |
PDF描述 |
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| TSB14C01HV | 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
| TSB21LV03MHV | IC APEX 20KE FPGA 200K 484-FBGA |
| TSB21LV03CHV | IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER |
| TSB2203X6MMX30M | IC APEX 20KE FPGA 200K 240-PQFP |
| TSB2204.5X12MMX20M | IC APEX 20KE FPGA 200K 240-PQFP |
相关代理商/技术参数 |
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| TSB14C01PM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| TSB150002DS | 制造商:TE Connectivity 功能描述: |
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| TSB150005 | 功能描述:栅栏接线端子 5P TERM BLOCK 13.5MM 300V 40A RoHS:否 制造商:TE Connectivity / AMP 产品:Barrier Terminal Blocks 系列: 类型:Dual Barrier, Flat Block without Mounting Ears 节距:9.53 mm 位置/触点数量:2 线规量程:22-12 电流额定值:20 A 电压额定值:300 V 安装风格:Through Hole 安装角:Vertical 端接类型:Screw 触点电镀:Tin |
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