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参数资料
| 型号： | TSI206 |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQFP32 |
| 封装： | LQFP-32 |
| 文件页数： | 23/28页 |
| 文件大小： | 286K |
| 代理商： | TSI206 |
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Tsi206 Primary Side Monitor with Inrush Control
Datasheet
- 4 -
Tundra Semiconductor Corporation
80C7000_MA001_01 April 2006
Undervoltage shutdown and startup (voltage at input rail)
UV low threshold
(shutdown)
VUVL
Voltage at input rail
Input voltage decreasing
Set by R3 and R9
VUVL = VUV × (R3 + R9)/R9
V
UV high threshold
(startup)
VUVH
Voltage at input rail
Input voltage increasing
Programmed by R3
VUVH = VUVL + (IUVHY × R3)/
1000 (R3 expressed in k
Ω)
V
UV hysteresis
VUVHY
Voltage at input rail
Programmed by R3
VUVHY = (IUVHY × R3)/1000
(R3 expressed in k
Ω)
V
Hysteresis current sink
IUVHY
UV shutdown condition
9.9
11
12.1
μA
Current sense amplifier
Output range
VISENSE
Voltage at SENSE_OUT
pin
0.121
—
2.377
V
Input range
VCM
Voltage between SENSE_N
and SENSE_P input pins
and VSS
-0.1
—
2
V
Input offset
VOFFSET
——
1
mV
Input resistance
RIN
—10
—
M
Ω
DC open loop gain
RLOAD >50 kΩ
60
—
dB
Unity gain bandwidth
CLOAD < 50 pF
RLOAD >50 kΩ
100
—
kHz
Overcurrent detection
threshold
OC
Voltage at SENSE_IN pin
2.37
2.39
2.42
V
Overcurrent hysteresis
OCHY
—
200
—
mV
Inrush current limiting
CT capacitor charge
current
ICHARGE
Current limit time-out
45
50
55
μA
CT capacitor discharge
current
IDISCHARGE
Current limit retry delay
0.9
1
1.1
μA
CT trip high
VREF_2
1.99
2
2.01
V
CT trip low
VREF_1
0.49
0.5
0.51
V
Inrush complete
VFETA
Inrush complete is detected
when voltage between
FETA and VSS pins
exceeds this threshold
1.24
1.25
1.26
V
Table 3 — DC characteristics (Continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
(Sheet 2 of 4)
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