参数资料
型号: TSI206
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 电源管理
英文描述: POWER SUPPLY MANAGEMENT CKT, PQFP32
封装: LQFP-32
文件页数: 1/28页
文件大小: 286K
代理商: TSI206
80C7000_MA001_01 April 2006
Tundra Semiconductor Corporation
- 1 -
Datasheet
Tsi206 Primary Side Monitor with Inrush
Control
Features
Input voltage measurement (24 V or 48 V)
10-bit analog-to-digital converter (ADC)
Input voltage measurement accuracy 0.5%
Control of inrush current
Fuse status monitoring, high and low side
Primary current sensing and measurement
Primary side undervoltage, overvoltage and
brownout detection
Electronic circuit breaker function
Enable control for intermediate bus power
converter
Isolated PI-Link interface to secondary side
controller transmits primary voltage, current,
fuse status and input status data
Input UV shutdown accuracy <1%
Self-powered from 24 V or 48 V nominal
Applications
Telecom and datacom cards
ATCA (Advanced Telecom Compute
Architecture) systems
Industrial controllers
Single board computers
Description
The Tsi206 is designed to monitor parameters on
the high voltage primary side of an on-card power
system in a distributed power architecture.
In a typical 24 V or 48 V application, the Tsi206
measures input voltage and current and transmits
the digitized values through the PI-Link interface to
the secondary side controller (Tsi257). It also
controls an external MOSFET to limit card inrush
current at startup. Programmable input overvoltage
(OV) and undervoltage (UV) detection are provided.
The Tsi206 provides on-off control for an isolated
power converter that supplies the intermediate bus
voltage for the card. It monitors the status of up to
four input fuses, both high side and low side. Fuse
status information is transmitted to the secondary
side through the serial PI-Link interface.
Figure 1 — Typical application circuit
VDDO
SHUNT
SEAT
UV
SENSE_IN
VBATT
FUSE_H
FUSE_L
VBG
AUX
TX_H
BUSOFF
FETA
SENSE_P
SENSE_OUT
SENSE_N
VSS
POR
BIAS
TX_L
Tsi206
ENABLE
Brick
shutdown
signal
from
Tsi257
Monitor
signal
to
Tsi257
IB rail
+
-
Primary
Secondary
0 V
(Battery
return)
-48 V A
-48 V B
Fuse A
Fuse B
Seat
(short pins)
R1 R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R14
R15
R16
R18
D1
D2
C1
C2
R17
Card
co
nne
ctor
pins
C4
Enable
+
-
Isolation
circuit
(see Fig. 7)
Power connections
shown as
VSSO
VDD
R13
EMI
filter
Intermediate
bus (IB) brick
MD533J
NC
R19
VCTRL
Q1
Q2
R21
C3
C5
CT
R22
C7
C6
C11
OP1
OP2
T1
R20
Note: High-side fuse monitoring is not shown – refer to Figure 8.
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