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参数资料
| 型号： | TSI206 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQFP32 |
| 封装： | LQFP-32 |
| 文件页数： | 11/28页 |
| 文件大小： | 286K |
| 代理商： | TSI206 |
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Datasheet
Tsi206 Primary Side Monitor with Inrush Control
80C7000_MA001_01 April 2006
Tundra Semiconductor Corporation
- 19 -
Required gain = 2.4 / 0.15 = 16
Amplifier gain = 1 + R15/R12
If R15 = 47.5 k
Ω, the value for R12 = 3.17 kΩ. The
closest standard value is 3.16 k
Ω.
The I2R power loss in the shunt is increased to
1.48 W maximum at full load (12.2 A), and 2.25 W
at current limit.
MOSFET selection
The inrush MOSFET must be rated to handle the
maximum
input
voltage,
allowing
adequate
derating. Typically, a rating of at least 150 V is
recommended for the wide range 48 V input used in
most telecom applications (36 V to 75 V, with 100 V
peak). Choose a MOSFET with a low enough
RDSON so that the continuous power dissipation is
low under all operating conditions. The MOSFET
must be rated to handle the peak inrush current and
the peak current during input transients.
The MOSFET is subject to a high peak power
during the inrush, since the full current flows into the
input capacitors while there is still a high voltage
across the device. The energy dissipated in the
MOSFET during the inrush period is approximately
equal to the energy stored in the input capacitors.
The MOSFET must be rated to handle this peak
power. Refer also to Inrush limit fault time-out on
MOSFET gate drive
Select the value of the gate resistor R19 to provide
a suitable time constant with the MOSFET gate
capacitance and C5. If R19 is a very high value, the
startup time may be too long. If R19 is a very low
value, it can cause instability. It is recommended to
use a resistor in the range of 500 k
Ω to 1 MΩ.
The gate voltage is set by the divider R19, R13, and
R14. Select a total value for R13 and R14 that will
guarantee that the gate voltage of the MOSFET is
above the saturation voltage at minimum input, and
does not exceed its rated maximum VGS at
maximum input voltage.
For example, assume a MOSFET with a gate
saturation voltage of 6.5 V, and maximum VGS of
20 V. The gate voltage VGS is given by:
VGS = (Vin×Reff)/(Reff + R19)
where Reff is R14 + R13.
Note: The small voltage across current shunt R18
can be ignored.
Choose resistor values so that VGS <20V at
maximum input voltage (typically 100 V), and VGS
> 6.5 V at minimum input voltage (typically 37 V). If
R19 is 602 k
Ω, R
eff is calculated to be 151 kΩ
maximum.
At minimum input voltage of 37 V, VGS is calculated
to be 7.41 V, which guarantees the MOSFET turns
on fully since it is above the saturation voltage of
6.5 V.
Note: If the input voltage range is very wide, it may
not be possible to select resistors that guarantee
saturation at minimum input while not exceeding
the maximum gate voltage at maximum input. In
this case, a zener diode can be added across C5 to
clamp the maximum gate voltage.
Divider resistors for FETA pin
R13 and R14 form a divider to reduce the voltage
seen at the FETA pin. Select the resistor divider
ratio to meet two criteria:
The divider ratio must ensure that the Tsi206
correctly detects when the inrush is complete,
even with the minimum input voltage. This
requires that the voltage at the FETA pin is at
least 1.25 V above VSS.
The voltage at the FETA pin must not exceed
the maximum allowed, even with the maximum
DC input voltage. It is not necessary to consider
transient input voltages shorter than the gate
time constant.
The gate voltage of the MOSFET must be
above the gate turn-on threshold at the point
where the voltage at the FETA pin reaches
1.25 V. This avoids incorrectly detecting that
inrush is complete before the MOSFET is fully
turned on.
With the example discussed above, R19 is 602 k
Ω,
R20 is 301 k
Ω, and R14 and R13 can be 120 kΩ
and 27 k
Ω respectively. At a gate voltage of 6.8 V,
the voltage at pin FETA is then calculated to be
1.25 V so that inrush complete is correctly detected
above the gate saturation voltage.
Transistor Q2 uses the MMBTA06 or equivalent.
Collector-emitter voltage rating must be at least
30 V.
Inrush limit fault time-out
As described in Inrush limit fault detection on
page 13, the capacitor C3 connected to the CT pin
provides a fault timer. Choose a value for C3 that
sets the time-out to be approximately twice the
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