
Datasheet
Tsi206 Primary Side Monitor with Inrush Control
80C7000_MA001_01 April 2006
Tundra Semiconductor Corporation
- 13 -
are used to reduce the high voltages to levels
suitable for the Tsi206 inputs.
Primary side current measurement
The Tsi206 has an internally compensated low-
offset current sense amplifier whose gain can be set
by external resistors (R12 and R15 in
Figure 1). The
gain
is
1 + (R15/R12).
Set
up
the
gain
in
conjunction with the current sense resistor, so that
the output of the current sense amplifier is
approximately 2 V at full load. It is recommended to
use a value of approximately 50 k
Ω for R15.
In most applications, the output of the current sense
amplifier (pin SENSE_OUT) is connected to the
sensing input of the 10-bit ADC (pin SENSE_IN —
value is converted to a voltage, sampled by the
ADC and stored in a register for transmission to the
secondary side. The transmitted current is an 8-bit
value (the two LSBs are discarded).
An internal reference is used to generate an
overcurrent (OC) alarm when the SENSE_IN pin of
the ADC reaches 2.39 V. This is a single bit value
and is transmitted to the secondary side. If the OC
condition persists for a predetermined time (set by
C3), the Tsi206 turns off power to the card, as
Inrush current limiting
The
Tsi206
drives
an
external
small-signal
transistor Q2 (refer to
Figure 1) that controls the
gate voltage of the power MOSFET Q1. When the
input voltage is applied to the card, the gate
capacitor C5 begins to charge through R19. The
gate voltage of Q1 rises until Q1 starts to conduct
and current flows into the card input capacitance,
shown as C4. The Tsi206 detects the rising current
in the sense resistor R18, and starts to drive Q2 to
limit the gate voltage of Q1. The feedback control
within the Tsi206 ensures that the inrush current
does not exceed the value established as the OC
threshold.
When the input capacitor C4 is almost fully charged,
the inrush current starts to fall and the Tsi206
reduces the drive to Q2. The gate voltage of Q1
rises until it reaches a final value set by the resistor
divider R19, R14 and R13. The Tsi206 detects the
rising gate voltage through the pin FETA, as
Inrush limit fault detection
The Tsi206 has a timer for inrush limiting, set by the
value of the capacitor C3 at pin CT (refer to
Figure 1). The Tsi206 uses an internal current
source of 50
μA to charge this capacitor. If the
inrush current is still at its limiting value when the
voltage at CT reaches 2 V, the Tsi206 detects a
card fault condition. The Tsi206 immediately turns
off the inrush MOSFET (by turning Q2 on) and
starts to discharge C3. The discharge current is
only 1
μA, and therefore the discharge time is
approximately 50× longer than the charge time.
After C3 has discharged, the Tsi206 initiates
another inrush cycle, again limiting current at the
OC threshold. If the fault has cleared, the card
starts normally. If the fault is still present, the Tsi206
again shuts off the MOSFET as before. The Tsi206
allows a maximum of seven attempts to start. If the
inrush current remains high after seven attempts,
no further restarts are initiated until input power is
cycled, input UV is detected, or the SEAT pin
becomes invalid.
If the fault detection function is not required, the CT
pin can be tied to VSS.
Circuit breaker function
The Tsi206 provides an electronic circuit breaker
function during normal operation. If the input current
exceeds the programmed OC threshold, the circuit
breaker operates by turning off the inrush MOSFET
to prevent nuisance tripping, set by the capacitor on
the CT pin (C3 in
Figure 1). After the circuit breaker
has operated, the MOSFET remains off while C3
discharges, approximately 50× the initial time delay.
Note: The OC level used as the trip point for the
circuit breaker is the same as that used for the
inrush current limit and for the OC status bit
transmitted to the secondary.
If not required, the circuit breaker function can be
disabled by connecting the CT pin directly to VSS.
Primary side voltage measurement
Primary voltage is monitored after the input fuses
and ORing devices, and is the voltage seen at the
input of the brick. (In most applications, an EMI filter
is used between the Tsi206 and the brick, as shown
in
Figure 1. Voltage drop across the EMI filter is
usually
very
small.)
The
primary
voltage
is
connected through a resistor divider into the VBATT
pin, sampled by a 10-bit ADC and stored in a
register for transmission to the secondary side.