参数资料
型号: TSPC106AVG83CG
厂商: E2V TECHNOLOGIES PLC
元件分类: 总线控制器
英文描述: PCI BUS CONTROLLER, CBGA303
封装: 21 X 25 MM, 3.16 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-303
文件页数: 14/41页
文件大小: 581K
代理商: TSPC106AVG83CG
21
TSPC106A
2102C–HIREL–01/05
After the C4 solder bump is reflowed, epoxy (encapsulant) is under-filled between the
die and the substrate. Under-fill material is commonly used on large high-power die;
however, this is not a requirement of the C4 technology. The package substrate is a
multilayer-co-fired ceramic. The package-to-board interconnection is via an array of
orthogonal 90/10 (lead/tin) solder balls on 1.27 mm pitch. During assembly of the
C4/CBGA package to the board, the high-melt balls do not collapse.
Figure 5. Exploded Cross-section
Internal Package Conduction
Resistance
For the C4/CBGA packaging technology, the intrinsic conduction thermal resistance
paths are as follows:
the die junction-to-case thermal resistance
the die junction-to-lead thermal resistance
These parameters are shown in Table 12. In the C4/CBGA package, the silicon chip is
exposed; therefore, the package case is the top of the silicon.
Figure 6 shows a simplified thermal network in which a C4/CBGA package is mounted
on a printed-circuit board.
Figure 6. C4/CBGA Package Mounted on a Printed Circuit Board
Note:
Internal package resistance differs from external package resistance.
CBGA Package
CI_CGA Package
Chip with C4 Encapsulant
Ceramic Substrate
BGA Joint
Printed Circuit Board
Table 12. Thermal Resistance
Thermal Metric
Effective Thermal Resistance
Junction-to-case thermal resistance
0.133
°C/W
Junction-to-lead (ball) thermal resistance
3.8
°C/W (CBGA package)
Junction-to-lead (column) thermal resistance
4.0
°C/W (CI_CGA package)
External Resistance
Internal Resistance
Radiation
Convection
Heat Sink
Thermal Interface Material
Die/Package
Die Junction
Package/Leads
Printed Circuit Board
Radiation
Convection
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