参数资料
型号: TSS461F
厂商: Atmel Corp.
英文描述: VAN Data Link Controller
中文描述: 凡数据链路控制器
文件页数: 28/57页
文件大小: 397K
代理商: TSS461F
28
7615A–AUTO–02/06
TSS461F
IDLE: Idle Command
If the user sets the Idle bit, the circuit will enter idle mode. In idle mode the oscillator will oper-
ate, but the TSS461F will not transmit or receive anything on the bus, and the TXD output will
be in three-state
One: Idle active
Zero: Idle inactive
ACTI: Activate
Command
The Activate command will put the circuit in the active mode, i.e it will transmit and receive nor-
mally on the bus. When the circuit is in activate mode the TXD three-state output is enabled.
One: Activate active
Zero: Activate inactive
REAR: Re-Arbitrate
Command
This command will, after the current attempt, reset the retry counter and re-arbitrate the mes-
sages to be transmitted in order to find the highest priority message to transmit.
One: Re-arbitrate active
Zero: Re-arbitrate inactive
MSDC: Manual System
Diagnosis Clock
Rather than using the SDC divider described in section “Diagnosis Control Register (0x02)”, the
user can use the manual SDC command to generate a SDC pulse for the diagnosis system.
This MSDC pulse should be high at least two timeslot clock.
Line Status Register
(0x04)
Read only register.
Default value after reset: 0bx01xxx00.
This register reports the operation mode of the TSS461F in the Sleep an Idle bits
(Command Register located at address 0y03) as well as the diagnosis system status bits S2
to S0 discussed in section “Diagnosis System”.
SPG: Sleeping
IDG: Idling
Default mode at reset
Sa, Sb and Sc
Diagnosis system status bits
Sa and Sb
7
6
5
4
3
2
1
0
x
SPG
IDG
Sc
Sb
Sa
TXG
RXG
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