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参数资料
| 型号： | TSS461F |
| 厂商： | Atmel Corp. |
| 英文描述： | VAN Data Link Controller |
| 中文描述： | 凡数据链路控制器 |
| 文件页数： | 6/57页 |
| 文件大小： | 397K |
| 代理商： | TSS461F |
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6
7615A–AUTO–02/06
TSS461F
Microprocessor
Interface
The processor controls the TSS461F by reading and writing the internal registers of the circuit.
These registers appear to the processor as regular memory locations.
Interface Modes
The TSS461F must be plugged in an Intel or Motorola environment with an 8-bit address/data
bus multiplexed.
Table 1.
Access Mode Logic
In Intel environment, access operations need CS active, a read one with RD active, a write one
with WR active. If TSS461F is the single peripheral in the processor space, CS can be wired to
VCC.
In Motorola environment, the RD pin is wired to VSS and the access operations are driven by
CS (E). Contrary to Intel mode, CS (E) must never be wired to Vcc even if the TSS461F is alone.
To switch on-the-fly from one mode to the other, CS must be inactive.
Intel Mode
The Intel mode interface consists of 13 pins. 8 pins are the multiplexed address and data bus,
and the rest are the address strobe, the read and write commands, the chip select and the inter-
rupt request pins.
To access the memory locations in Intel mode, the processor must first assert a valid address on
the multiplexed address and data bus and drive the address strobe pin high. When the required
set up time has passed, the processor must drive the address strobe low, and keep the address
valid for the required hold time.
The processor must then either assert the data to be written on the address and data bus, if a
write is intended, or float the data bus for a read. The next step is to drive either the write or read
command pins low, according to the function required, and at the same time drive the chip select
pin high.
The TSS461F access cycle is then terminated by driving the chip select and command pins low.
Note:
that the chip select pin may be driven high for the entire access cycle, and may also remain high
during and after the termination of the cycle.
CS (E)
RD
WR (R/W)
Operation Mode
0
No operation
1
0
0
Write Operation in Motorola mode
1
0
1
Read operation in both modes
1
1
0
Write operation in Intel mode
1
1
1
No operation
相关PDF资料 |
PDF描述 |
|---|---|
| TSS463-AAR | VAN Data Link Controller with Serial Interface |
| TSS463A-TERZ | VAN Data Link Controller with Serial Interface |
| TSS463C | VAN Data Link Controller with Serial Interface |
| TSS4B02G | Single Phase 4.0 Amps. Glass Passivated Super Fast Bridge Rectifiers |
| TSS4B03G | Single Phase 4.0 Amps. Glass Passivated Super Fast Bridge Rectifiers |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TSS461F-TDRZ-9 | 功能描述:网络控制器与处理器 IC Van Data Link Controller RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| TSS461F-TDSZ-9 | 功能描述:网络控制器与处理器 IC ASICS RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray |
| TSS463 | 制造商:Atmel Corporation 功能描述:LAN Node Controller, 16 Pin, SOP 制造商:Temic 功能描述:LAN Node Controller, 16 Pin, SOP |
| TSS463-AA | 制造商:未知厂家 制造商全称:未知厂家 功能描述:TSS463-AA [Updated 3/03. 60 Pages] |
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