2–8
TVP5000
XTAL1
XTAL2
35
36
TVP5000
XTAL1
XTAL2
35
36
26.8 MHz or
24.576 MHz
Crystal
26.8 MHz or
24.576 MHz
TTL Clock
Figure 2–11. Reference Clock Configurations
The sampling frequencies that control the number of pixels per line differ depending on the video format and
standards. Table 2–1 shows a summary of the sampling frequencies.
Table 2–1. Summary of the Line Frequencies, Data Rates, and Pixel Counts
STANDARDS
HORIZONTAL
LINE RATE
(kHz)
PIXELS
PER LINE
ACTIVE PIXELS
PER LINE
PIXEL
PCLK RATE
(MHz)
SYSTEM clk2
FREQUENCY
(MHz)
NTSC, square-pixel
15.73426
780
640
12.2727
24.54
NTSC, ITU-R BT.601
15.73426
858
720
13.5
27.0
PAL (B,D,G,H,I), square-pixel
15.625
944
768
14.75
29.5
PAL (B,D,G,H,I), ITU-R BT.601
15.625
864
720
13.5
27.0
PAL(M), square-pixel
15.73426
780
640
12.2727
24.54
PAL(M), ITU-R BT.601
15.73426
858
720
13.5
27.0
PAL(N), square-pixel
15.625
944
768
14.75
29.5
PAL(N), ITU-R BT.601
15.625
864
720
13.5
27.0
2.3
I2C Interface
The I2C standard consists of two signals, serial input/output data (SDA) line and input/output clock line
(SCL), that carry information between the devices connected to the bus. A third signal (I2CA) is used for
slave address selection. Although the I2C system can be multimastered, the TVP5010 will function as a
slave device only.
Both SDA and SCL are bidirectional lines that connect to a positive supply voltage via a pullup resistor. When
the bus is free, both lines are high.
The slave address (I2CA) should be tied high or low to distinguish between two TVP5010 devices commonly
on the I2C bus.
Table 2–3 summarizes the terminal functions of the I2C mode host interface.
Table 2–2. I2C Host Port Terminal Description
SIGNAL
TYPE
DESCRIPTION
I2CA
I
Slave address selection
SCL
I/O (OD)
Input/output clock line
SDA
I/O (OD)
Input/output data line