参数资料
型号: TVP5150PBSR
厂商: TEXAS INSTRUMENTS INC
元件分类: 颜色信号转换
英文描述: COLOR SIGNAL DECODER, PQFP32
封装: GREEN, PLASTIC, TQFP-32
文件页数: 21/68页
文件大小: 917K
代理商: TVP5150PBSR
Functional Description
22
May 2006
SLES043A
TVP5150
5
XTAL1
14.318-MHz or
27-MHz Crystal
6
XTAL2
TVP5150
5
XTAL1
6
XTAL2
CL1
CL2
14.318-MHz or
27-MHz Clock
R
NOTE: 100-k
resistor R is optional
Figure 312. Reference Clock Configurations
3.20 Genlock Control (GLCO) and Real-Time Control (RTC)
A Genlock control function is provided to support a standard video encoder to synchronize its internal color
phase DCO for a clean video line and color lock.
The frequency control word of the internal color subcarrier digital control oscillator (DCO) and the subcarrier
phase reset bit are transmitted via terminal 23 (GLCO). The frequency control word is a 23-bit binary number.
The frequency of the DCO can be calculated from the following equation:
dco
ctrl
sclk
F
=
x
23
2
where Fdco is the frequency of the DCO, Fctrl is the 23-bit DCO frequency control, and Fsclk is the frequency
of the SCLK.
3.20.1
TVP5150 Genlock Control Interface
A write of 1 to bit 4 of the chrominance control register at I2C subaddress 1Ah causes the subcarrier DTO
phase reset bit to be sent on the next scan line on GLCO. The active low reset bit occurs 7 SCLKs after the
transmission of the last bit of DCO frequency control. Upon the transmission of the reset bit, the phase of the
TVP5150 internal subcarrier DCO is reset to zero.
A Genlock slave device can be connected to the GLCO terminal and use the information on GLCO to
synchronize its internal color phase DCO to achieve clean line and color lock.
Figure 313 shows the timing diagram of the GLCO mode.
SCLK
GLCO
23-Bit Frequency Control
Start Bit
DCO Reset Bit
MSB
>128 SCLK
1 SCLK
7 SCLK
23 SCLK
1 SCLK
LSB
22
21
0
Figure 313. GLCO Timing
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